/linux/drivers/iommu/arm/arm-smmu/ |
H A D | arm-smmu.c | 3 * IOMMU API for ARM architected SMMU implementations. 13 * - Non-secure access to the SMMU 18 #define pr_fmt(fmt) "arm-smmu: " fmt 41 #include "arm-smmu.h" 45 * Apparently, some Qualcomm arm64 platforms which appear to expose their SMMU 59 …"Force SMMU mappings to be installed at a particular stage of translation. A value of '1' or '2' f… 64 …domain will report an abort back to the device and will not be allowed to pass through the SMMU."); 72 static inline int arm_smmu_rpm_get(struct arm_smmu_device *smmu) in arm_smmu_rpm_get() argument 74 if (pm_runtime_enabled(smmu->dev)) in arm_smmu_rpm_get() 75 return pm_runtime_resume_and_get(smmu->dev); in arm_smmu_rpm_get() [all …]
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H A D | arm-smmu-nvidia.c | 12 #include "arm-smmu.h" 21 * In addition, the SMMU driver needs to coordinate with the memory controller 30 * SMMU instance. 35 struct arm_smmu_device smmu; member 41 static inline struct nvidia_smmu *to_nvidia_smmu(struct arm_smmu_device *smmu) in to_nvidia_smmu() argument 43 return container_of(smmu, struct nvidia_smmu, smmu); in to_nvidia_smmu() 46 static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu, in nvidia_smmu_page() argument 51 nvidia_smmu = container_of(smmu, struct nvidia_smmu, smmu); in nvidia_smmu_page() 52 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page() 55 static u32 nvidia_smmu_read_reg(struct arm_smmu_device *smmu, in nvidia_smmu_read_reg() argument [all …]
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H A D | Makefile | 4 arm_smmu-objs += arm-smmu.o arm-smmu-impl.o arm-smmu-nvidia.o 5 arm_smmu-$(CONFIG_ARM_SMMU_QCOM) += arm-smmu-qcom.o 6 arm_smmu-$(CONFIG_ARM_SMMU_QCOM_DEBUG) += arm-smmu-qcom-debug.o
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/linux/drivers/iommu/ |
H A D | tegra-smmu.c | 26 struct tegra_smmu *smmu; member 56 struct tegra_smmu *smmu; member 72 static inline void smmu_writel(struct tegra_smmu *smmu, u32 value, in smmu_writel() argument 75 writel(value, smmu->regs + offset); in smmu_writel() 78 static inline u32 smmu_readl(struct tegra_smmu *smmu, unsigned long offset) in smmu_readl() argument 80 return readl(smmu->regs + offset); in smmu_readl() 89 #define SMMU_TLB_CONFIG_ACTIVE_LINES(smmu) \ argument 90 ((smmu)->soc->num_tlb_lines & (smmu)->tlb_mask) 168 static bool smmu_dma_addr_valid(struct tegra_smmu *smmu, dma_addr_t addr) in smmu_dma_addr_valid() argument 171 return (addr & smmu->pfn_mask) == addr; in smmu_dma_addr_valid() [all …]
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/linux/drivers/iommu/arm/arm-smmu-v3/ |
H A D | arm-smmu-v3.c | 33 #include "arm-smmu-v3.h" 111 static void parse_driver_options(struct arm_smmu_device *smmu) in parse_driver_options() argument 116 if (of_property_read_bool(smmu->dev->of_node, in parse_driver_options() 118 smmu->options |= arm_smmu_options[i].opt; in parse_driver_options() 119 dev_notice(smmu->dev, "option %s\n", in parse_driver_options() 214 static void queue_poll_init(struct arm_smmu_device *smmu, in queue_poll_init() argument 219 qp->wfe = !!(smmu->features & ARM_SMMU_FEAT_SEV); in queue_poll_init() 371 static struct arm_smmu_cmdq *arm_smmu_get_cmdq(struct arm_smmu_device *smmu, in arm_smmu_get_cmdq() argument 376 if (smmu->impl_ops && smmu->impl_ops->get_secondary_cmdq) in arm_smmu_get_cmdq() 377 cmdq = smmu->impl_ops->get_secondary_cmdq(smmu, ent); in arm_smmu_get_cmdq() [all …]
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H A D | tegra241-cmdqv.c | 15 #include "arm-smmu-v3.h" 108 "This allows to disable CMDQV HW and use default SMMU internal CMDQ."); 163 * @smmu: SMMUv3 device 174 struct arm_smmu_device smmu; member 267 __arm_smmu_cmdq_skip_err(&vintf->cmdqv->smmu, &vcmdq->cmdq); in tegra241_vintf0_handle_error() 318 tegra241_cmdqv_get_cmdq(struct arm_smmu_device *smmu, in tegra241_cmdqv_get_cmdq() argument 322 container_of(smmu, struct tegra241_cmdqv, smmu); in tegra241_cmdqv_get_cmdq() 330 /* Use SMMU CMDQ if VINTF0 is uninitialized */ in tegra241_cmdqv_get_cmdq() 346 /* Unsupported CMD goes for smmu->cmdq pathway */ in tegra241_cmdqv_get_cmdq() 457 static int tegra241_cmdqv_hw_reset(struct arm_smmu_device *smmu) in tegra241_cmdqv_hw_reset() argument [all …]
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H A D | arm-smmu-v3-iommufd.c | 8 #include "arm-smmu-v3.h" 21 base_idr = master->smmu->base + ARM_SMMU_IDR0; in arm_smmu_hw_info() 24 info->iidr = readl_relaxed(master->smmu->base + ARM_SMMU_IIDR); in arm_smmu_hw_info() 25 info->aidr = readl_relaxed(master->smmu->base + ARM_SMMU_AIDR); in arm_smmu_hw_info() 102 if (nested_domain->vsmmu->smmu != master->smmu) in arm_smmu_attach_dev_nested() 291 struct arm_smmu_device *smmu = vsmmu->smmu; in arm_vsmmu_cache_invalidate() local 323 ret = arm_smmu_cmdq_issue_cmdlist(smmu, &smmu->cmdq, last->cmd, in arm_vsmmu_cache_invalidate() 347 struct arm_smmu_device *smmu = in arm_vsmmu_alloc() local 356 if (!(smmu->features & ARM_SMMU_FEAT_NESTING)) in arm_vsmmu_alloc() 359 if (s2_parent->smmu != master->smmu) in arm_vsmmu_alloc() [all …]
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H A D | arm-smmu-v3-test.c | 8 #include "arm-smmu-v3.h" 26 static struct arm_smmu_device smmu = { variable 183 .smmu = &smmu, in arm_smmu_test_make_cdtable_ste() 302 .smmu = &smmu, in arm_smmu_test_make_s2_ste() 455 .smmu = &smmu, in arm_smmu_test_make_s1_cd() 505 .smmu = &smmu, in arm_smmu_test_make_sva_cd() 515 .smmu = &smmu, in arm_smmu_test_make_sva_release_cd() 598 arm_smmu_make_bypass_ste(&smmu, &bypass_ste); in arm_smmu_v3_test_suite_init() 604 .name = "arm-smmu-v3-kunit-test", 611 MODULE_DESCRIPTION("KUnit tests for arm-smmu-v3 driver");
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H A D | Makefile | 3 arm_smmu_v3-y := arm-smmu-v3.o 4 arm_smmu_v3-$(CONFIG_ARM_SMMU_V3_IOMMUFD) += arm-smmu-v3-iommufd.o 5 arm_smmu_v3-$(CONFIG_ARM_SMMU_V3_SVA) += arm-smmu-v3-sva.o 8 obj-$(CONFIG_ARM_SMMU_V3_KUNIT_TEST) += arm-smmu-v3-test.o
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/linux/drivers/memory/tegra/ |
H A D | tegra210.c | 20 .smmu = { 36 .smmu = { 52 .smmu = { 68 .smmu = { 84 .smmu = { 100 .smmu = { 116 .smmu = { 132 .smmu = { 148 .smmu = { 164 .smmu = { [all …]
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H A D | tegra114.c | 31 .smmu = { 47 .smmu = { 63 .smmu = { 79 .smmu = { 95 .smmu = { 111 .smmu = { 127 .smmu = { 143 .smmu = { 159 .smmu = { 175 .smmu = { [all …]
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H A D | tegra124.c | 32 .smmu = { 48 .smmu = { 64 .smmu = { 80 .smmu = { 96 .smmu = { 112 .smmu = { 128 .smmu = { 144 .smmu = { 160 .smmu = { 176 .smmu = { [all …]
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H A D | tegra30.c | 54 .smmu = { 71 .smmu = { 88 .smmu = { 105 .smmu = { 122 .smmu = { 139 .smmu = { 156 .smmu = { 173 .smmu = { 190 .smmu = { 207 .smmu = { [all …]
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/linux/drivers/acpi/arm64/ |
H A D | iort.c | 412 struct acpi_iort_smmu_v3 *smmu; in iort_get_id_mapping_index() local 424 smmu = (struct acpi_iort_smmu_v3 *)node->node_data; in iort_get_id_mapping_index() 430 if (smmu->event_gsiv && smmu->pri_gsiv && in iort_get_id_mapping_index() 431 smmu->gerr_gsiv && smmu->sync_gsiv) in iort_get_id_mapping_index() 433 } else if (!(smmu->flags & ACPI_IORT_SMMU_V3_DEVICEID_VALID)) { in iort_get_id_mapping_index() 437 if (smmu->id_mapping_index >= node->mapping_count) { in iort_get_id_mapping_index() 443 return smmu->id_mapping_index; in iort_get_id_mapping_index() 536 * as NC (named component) -> SMMU -> ITS. If the type is matched, in iort_node_map_platform_id() 556 * device (such as SMMU, PMCG),its iort node already cached in iort_find_dev_node() 888 struct acpi_iort_node *smmu, in iort_get_rmrs() argument [all …]
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/linux/arch/arm64/boot/dts/marvell/ |
H A D | armada-8040.dtsi | 20 <0x0 &smmu 0x480 0x20>, 21 <0x100 &smmu 0x4a0 0x20>, 22 <0x200 &smmu 0x4c0 0x20>; 36 iommus = <&smmu 0x444>; 40 iommus = <&smmu 0x445>; 44 iommus = <&smmu 0x440>; 48 iommus = <&smmu 0x441>; 52 iommus = <&smmu 0x454>; 56 iommus = <&smmu 0x450>; 60 iommus = <&smmu 0x451>;
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H A D | armada-7040.dtsi | 20 <0x0 &smmu 0x480 0x20>, 21 <0x100 &smmu 0x4a0 0x20>, 22 <0x200 &smmu 0x4c0 0x20>; 27 iommus = <&smmu 0x444>; 31 iommus = <&smmu 0x445>; 35 iommus = <&smmu 0x440>; 39 iommus = <&smmu 0x441>;
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H A D | cn9130-crb-A.dts | 22 <0x0 &smmu 0x480 0x20>, 23 <0x100 &smmu 0x4a0 0x20>, 24 <0x200 &smmu 0x4c0 0x20>;
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/linux/Documentation/devicetree/bindings/display/ |
H A D | arm,komeda.yaml | 102 iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>, 103 <&smmu 8>, 104 <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>, 105 <&smmu 9>;
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/linux/Documentation/devicetree/bindings/iommu/ |
H A D | arm,smmu-v3.yaml | 4 $id: http://devicetree.org/schemas/iommu/arm,smmu-v3.yaml# 23 const: arm,smmu-v3 53 Present if page table walks made by the SMMU are cache coherent with the 56 NOTE: this only applies to the SMMU itself, not masters connected 57 upstream of the SMMU. 63 description: Avoid sending CMD_PREFETCH_* commands to the SMMU. 70 doesn't support SMMU page1 register space. 85 compatible = "arm,smmu-v3";
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H A D | nvidia,tegra30-smmu.txt | 1 NVIDIA Tegra 30 IOMMU H/W, SMMU (System Memory Management Unit) 4 - compatible : "nvidia,tegra30-smmu" 6 of the SMMU register blocks. 10 - nvidia,ahb : phandle to the ahb bus connected to SMMU. 13 smmu { 14 compatible = "nvidia,tegra30-smmu";
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/linux/include/linux/ |
H A D | adreno-smmu-priv.h | 38 * struct adreno_smmu_priv - private interface between adreno-smmu and GPU 40 * @cookie: An opque token provided by adreno-smmu and passed 59 * The GPU driver (drm/msm) and adreno-smmu work together for controlling 60 * the GPU's SMMU instance. This is by necessity, as the GPU is directly 61 * updating the SMMU for context switches, while on the other hand we do 62 * not want to duplicate all of the initial setup logic from arm-smmu.
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/linux/include/soc/tegra/ |
H A D | mc.h | 35 * Tegra SMMU, whereas on Tegra186 and later this is the ID used to override the ARM SMMU 46 /* Tegra SMMU enable (Tegra210 and earlier) */ 50 } smmu; member 104 void tegra_smmu_remove(struct tegra_smmu *smmu); 113 static inline void tegra_smmu_remove(struct tegra_smmu *smmu) in tegra_smmu_remove() argument 186 const struct tegra_smmu_soc *smmu; member 204 struct tegra_smmu *smmu; member
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/linux/Documentation/devicetree/bindings/perf/ |
H A D | arm,smmu-v3-pmcg.yaml | 4 $id: http://devicetree.org/schemas/perf/arm,smmu-v3-pmcg.yaml# 25 - const: arm,smmu-v3-pmcg 26 - const: arm,smmu-v3-pmcg 57 compatible = "arm,smmu-v3-pmcg"; 65 compatible = "arm,smmu-v3-pmcg";
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/linux/arch/arm64/boot/dts/xilinx/ |
H A D | zynqmp.dtsi | 586 /* iommus = <&smmu 0x14e8>; */ 599 /* iommus = <&smmu 0x14e9>; */ 612 /* iommus = <&smmu 0x14ea>; */ 625 /* iommus = <&smmu 0x14eb>; */ 638 /* iommus = <&smmu 0x14ec>; */ 651 /* iommus = <&smmu 0x14ed>; */ 664 /* iommus = <&smmu 0x14ee>; */ 677 /* iommus = <&smmu 0x14ef>; */ 722 /* iommus = <&smmu 0x868>; */ 735 /* iommus = <&smmu 0x869>; */ [all …]
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/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra186.dtsi | 66 iommus = <&smmu TEGRA186_SID_EQOS>; 114 iommus = <&smmu TEGRA186_SID_GPCDMA_0>; 860 iommus = <&smmu TEGRA186_SID_SDMMC1>; 890 iommus = <&smmu TEGRA186_SID_SDMMC2>; 915 iommus = <&smmu TEGRA186_SID_SDMMC3>; 945 iommus = <&smmu TEGRA186_SID_SDMMC4>; 971 iommus = <&smmu TEGRA186_SID_SATA>; 1004 iommus = <&smmu TEGRA186_SID_HDA>; 1135 iommus = <&smmu TEGRA186_SID_XUSB_HOST>; 1157 iommus = <&smmu TEGRA186_SID_XUSB_DEV>; [all …]
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