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Searched +full:sm8750 +full:- +full:gcc (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-ufs-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - items:
20 - enum:
21 - qcom,qcs615-qmp-ufs-phy
22 - const: qcom,sm6115-qmp-ufs-phy
23 - items:
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H A Dqcom,sc8280xp-qmp-usb43dp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,sar2130p-qmp-usb3-dp-phy
20 - qcom,sc7180-qmp-usb3-dp-phy
21 - qcom,sc7280-qmp-usb3-dp-phy
22 - qcom,sc8180x-qmp-usb3-dp-phy
[all …]
H A Dqcom,sc8280xp-qmp-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,qcs615-qmp-gen3x1-pcie-phy
20 - qcom,qcs8300-qmp-gen4x2-pcie-phy
21 - qcom,sa8775p-qmp-gen4x2-pcie-phy
22 - qcom,sa8775p-qmp-gen4x4-pcie-phy
23 - qcom,sar2130p-qmp-gen3x2-pcie-phy
[all …]
/linux/drivers/clk/qcom/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
242 CMN PLL consumes the AHB/SYS clocks from GCC and supplies
243 the output clocks to the networking hardware and GCC blocks.
1159 tristate "SM8750 Display Clock Controller"
1165 SM8750 devices.
1288 tristate "SM8750 Global Clock Controller"
1292 Support for the global clock controller on SM8750 devices.
1411 Say Y if you want to toggle LPASS-adjacent resets within
1431 tristate "SM8750 TCSR Clock Controller"
1435 Support for the TCSR clock controller on SM8750 devices.
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H A Dgcc-sm8750.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
6 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/qcom,sm8750-gcc.h>
14 #include "clk-alpha-pll.h"
15 #include "clk-branch.h"
16 #include "clk-pll.h"
17 #include "clk-rcg.h"
18 #include "clk-regmap.h"
19 #include "clk-regmap-divider.h"
20 #include "clk-regmap-mux.h"
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/linux/Documentation/devicetree/bindings/ufs/
H A Dqcom,sm8650-ufshc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/qcom,sm8650-ufshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 # Select only our matches, not all jedec,ufs-2.0
18 - qcom,kaanapali-ufshc
19 - qcom,sm8650-ufshc
20 - qcom,sm8750-ufshc
22 - compatible
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/linux/Documentation/devicetree/bindings/usb/
H A Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <quic_wcheng@quicinc.com>
12 # Use the combined qcom,snps-dwc3 instead
21 - compatible
26 - enum:
27 - qcom,ipq4019-dwc3
28 - qcom,ipq5018-dwc3
29 - qcom,ipq5332-dwc3
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/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sm8550.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8550.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
20 - const: qcom,pcie-sm8550
21 - items:
22 - enum:
23 - qcom,sar2130p-pcie
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,rpmhcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
20 - qcom,glymur-rpmh-clk
21 - qcom,milos-rpmh-clk
22 - qcom,qcs615-rpmh-clk
23 - qcom,qdu1000-rpmh-clk
24 - qcom,sa8775p-rpmh-clk
25 - qcom,sar2130p-rpmh-clk
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-pcie.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
25 #include <dt-bindings/phy/phy-qcom-qmp.h>
27 #include "phy-qcom-qmp-common.h"
29 #include "phy-qcom-qmp.h"
30 #include "phy-qcom-qmp-pcs-misc-v3.h"
31 #include "phy-qcom-qmp-pcs-pcie-v4.h"
32 #include "phy-qcom-qmp-pcs-pcie-v4_20.h"
33 #include "phy-qcom-qmp-pcs-pcie-v5.h"
34 #include "phy-qcom-qmp-pcs-pcie-v5_20.h"
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H A Dphy-qcom-qmp-combo.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
25 #include <drm/bridge/aux-bridge.h>
27 #include <dt-bindings/phy/phy-qcom-qmp.h>
29 #include "phy-qcom-qmp-common.h"
31 #include "phy-qcom-qmp.h"
32 #include "phy-qcom-qmp-pcs-misc-v3.h"
33 #include "phy-qcom-qmp-pcs-usb-v4.h"
34 #include "phy-qcom-qmp-pcs-usb-v5.h"
35 #include "phy-qcom-qmp-pcs-usb-v6.h"
[all …]