| /linux/Documentation/devicetree/bindings/interconnect/ |
| H A D | qcom,sm8450-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8450-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8450
17 See also:: include/dt-bindings/interconnect/qcom,sm8450.h
22 - qcom,sm8450-aggre1-noc
23 - qcom,sm8450-aggre2-noc
24 - qcom,sm8450-clk-virt
25 - qcom,sm8450-config-noc
26 - qcom,sm8450-gem-noc
27 - qcom,sm8450-lpass-ag-noc
28 - qcom,sm8450-mc-virt
[all …]
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| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,sm8450-mdss.yaml | 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8450-mdss.yaml#
7 title: Qualcomm SM8450 Display MDSS
13 SM8450 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
20 const: qcom,sm8450-mdss
45 const: qcom,sm8450-dpu
54 - const: qcom,sm8450-dp
64 - const: qcom,sm8450-dsi-ctrl
73 const: qcom,sm8450-dsi-phy-5nm
82 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
83 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,sm8450-videocc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml#
7 title: Qualcomm Video Clock & Reset Controller on SM8450
15 domains on SM8450.
18 include/dt-bindings/clock/qcom,sm8450-videocc.h
24 - qcom,sm8450-videocc
57 - qcom,sm8450-videocc
67 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
71 compatible = "qcom,sm8450-videocc";
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| H A D | qcom,sm8450-dispcc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-dispcc.yaml#
7 title: Qualcomm Display Clock & Reset Controller for SM8450
14 domains on SM8450.
16 See also:: include/dt-bindings/clock/qcom,sm8450-dispcc.h
21 - qcom,sm8450-dispcc
66 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
70 compatible = "qcom,sm8450-dispcc";
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| H A D | qcom,gcc-sm8450.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM8450
14 domains on SM8450
16 See also:: include/dt-bindings/clock/qcom,gcc-sm8450.h
21 - qcom,gcc-sm8450
65 compatible = "qcom,gcc-sm8450";
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | qcom,sm8450-lpass-lpi-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8450 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8450 SoC.
18 const: qcom,sm8450-lpass-lpi-pinctrl
38 - $ref: "#/$defs/qcom-sm8450-lpass-state"
41 $ref: "#/$defs/qcom-sm8450-lpass-state"
45 qcom-sm8450-lpass-state:
90 compatible = "qcom,sm8450-lpass-lpi-pinctrl";
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| H A D | qcom,sm8450-tlmm.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM8450 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM8450 SoC.
20 const: qcom,sm8450-tlmm
38 - $ref: "#/$defs/qcom-sm8450-tlmm-state"
41 $ref: "#/$defs/qcom-sm8450-tlmm-state"
45 qcom-sm8450-tlmm-state:
106 compatible = "qcom,sm8450-tlmm";
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sm8450.dtsi | 8 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
10 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
12 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
13 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
22 #include <dt-bindings/interconnect/qcom,sm8450.h>
23 #include <dt-bindings/reset/qcom,sm8450-gpucc.h>
479 compatible = "qcom,scm-sm8450", "qcom,scm";
487 compatible = "qcom,sm8450-clk-virt";
493 compatible = "qcom,sm8450-mc-virt";
[all …]
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| H A D | sm8450-sony-xperia-nagara-pdx224.dts | 9 #include "sm8450-sony-xperia-nagara.dtsi"
13 compatible = "sony,pdx224", "qcom,sm8450";
|
| H A D | sm8450-sony-xperia-nagara-pdx223.dts | 9 #include "sm8450-sony-xperia-nagara.dtsi"
13 compatible = "sony,pdx223", "qcom,sm8450";
|
| H A D | Makefile | 286 dtb-$(CONFIG_ARCH_QCOM) += sm8450-hdk.dtb
287 dtb-$(CONFIG_ARCH_QCOM) += sm8450-qrd.dtb
288 dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx223.dtb
289 dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx224.dtb
|
| /linux/Documentation/devicetree/bindings/ufs/ |
| H A D | qcom,ufs.yaml | 43 - qcom,sm8450-ufshc
159 - qcom,sm8450-ufshc
300 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
303 #include <dt-bindings/interconnect/qcom,sm8450.h>
311 compatible = "qcom,sm8450-ufshc", "qcom,ufshc",
|
| /linux/include/dt-bindings/clock/ |
| H A D | qcom,sm8650-videocc.h | 9 #include "qcom,sm8450-videocc.h"
11 /* SM8650 introduces below new clocks and resets compared to SM8450 */
|
| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | qcom,lpass-wsa-macro.yaml | 18 - qcom,sm8450-lpass-wsa-macro
69 - qcom,sm8450-lpass-wsa-macro
|
| H A D | qcom,sm8250.yaml | 29 - const: qcom,sm8450-sndcard
43 - qcom,sm8450-sndcard
|
| /linux/drivers/pinctrl/qcom/ |
| H A D | pinctrl-sm8450-lpass-lpi.c | 198 .compatible = "qcom,sm8450-lpass-lpi-pinctrl",
207 .name = "qcom-sm8450-lpass-lpi-pinctrl",
215 MODULE_DESCRIPTION("QTI SM8450 LPI GPIO pin control driver");
|
| H A D | Kconfig | 109 tristate "Qualcomm Technologies Inc SM8450 LPASS LPI pin controller driver"
115 (Low Power Island) found on the Qualcomm Technologies Inc SM8450 platform.
|
| /linux/drivers/clk/qcom/ |
| H A D | gpucc-sm8450.c | 12 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
13 #include <dt-bindings/reset/qcom,sm8450-gpucc.h>
766 { .compatible = "qcom,sm8450-gpucc" },
800 .name = "sm8450-gpucc",
806 MODULE_DESCRIPTION("QTI GPU_CC SM8450 / SM8475 Driver");
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| /linux/sound/soc/qcom/ |
| H A D | sc8280xp.c | 192 {.compatible = "qcom,sm8450-sndcard", "sm8450"},
|
| /linux/Documentation/devicetree/bindings/cache/ |
| H A D | qcom,llcc.yaml | 40 - qcom,sm8450-llcc
275 - qcom,sm8450-llcc
|
| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | qcom,dwc3.yaml | 66 - qcom,sm8450-dwc3
366 - qcom,sm8450-dwc3
510 - qcom,sm8450-dwc3
|
| H A D | qcom,snps-dwc3.yaml | 66 - qcom,sm8450-dwc3
350 - qcom,sm8450-dwc3
495 - qcom,sm8450-dwc3
|
| /linux/Documentation/devicetree/bindings/iommu/ |
| H A D | arm,smmu.yaml | 61 - qcom,sm8450-smmu-500
86 - qcom,sm8450-smmu-500
105 - qcom,sm8450-smmu-500
507 - const: qcom,sm8450-smmu-500
|
| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | qcom,tcsr.yaml | 41 - qcom,sm8450-tcsr
|
| /linux/drivers/interconnect/qcom/ |
| H A D | sm8550.h | 3 * SM8450 interconnect IDs
|