Searched +full:sm6150 +full:- +full:dsi +full:- +full:phy +full:- +full:14 +full:nm (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6150-mdss.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Qualcomm SM6150 Display MDSS10 - Abhinav Kumar <quic_abhinavk@quicinc.com>11 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>15 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree16 bindings of MDSS are mentioned for SM6150 target.18 $ref: /schemas/display/msm/mdss-common.yaml#[all …]
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Qualcomm Display DSI 14nm PHY10 - Krishna Manikandan <quic_mkrishn@quicinc.com>13 - $ref: dsi-phy-common.yaml#18 - qcom,dsi-phy-14nm19 - qcom,dsi-phy-14nm-229020 - qcom,dsi-phy-14nm-660[all …]
1 // SPDX-License-Identifier: GPL-2.0-only6 #include <linux/clk-provider.h>8 #include <dt-bindings/phy/phy.h>13 (((n) >= 0) ? (((n) + (d) - 1) / (d)) : (((n) - (d) + 1) / (d)))20 v = (tmax - tmin) * percent; in linear_inter()23 return max_t(s32, min_result, v - 1); in linear_inter()35 temp = 300 * coeff - ((timing->clk_prepare >> 1) + 1) * 2 * ui; in dsi_dphy_timing_calc_clk_zero()36 tmin = S_DIV_ROUND_UP(temp, ui) - 2; in dsi_dphy_timing_calc_clk_zero()46 temp = (timing->hs_rqst + timing->clk_prepare + clk_z) & 0x7; in dsi_dphy_timing_calc_clk_zero()47 timing->clk_zero = clk_z + 8 - temp; in dsi_dphy_timing_calc_clk_zero()[all …]