| /freebsd/sys/contrib/device-tree/Bindings/iio/temperature/ |
| H A D | adi,ltc2983.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Analog Devices LTC2983, LTC2986, LTM2985 Multi-sensor Temperature system 10 - Nuno Sá <nuno.sa@analog.com> 13 Analog Devices LTC2983, LTC2984, LTC2986, LTM2985 Multi-Sensor Digital 16 https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf 17 https://www.analog.com/media/en/technical-documentation/data-sheets/2984fb.pdf 18 https://www.analog.com/media/en/technical-documentation/data-sheets/29861fa.pdf 19 https://www.analog.com/media/en/technical-documentation/data-sheets/ltm2985.pdf [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | cs42l52.txt | 5 - compatible : "cirrus,cs42l52" 7 - reg : the I2C address of the device for I2C 11 - cirrus,reset-gpio : GPIO controller's phandle and the number 14 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency. 21 - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured 23 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input. 25 - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured 27 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input. 29 - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin 42 reset-gpio = <&gpio 10 0>; [all …]
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| H A D | pcm3060.txt | 7 - compatible: "ti,pcm3060" 9 - reg : the I2C address of the device for I2C, the chip select 14 - ti,out-single-ended: "true" if output is single-ended; 22 ti,out-single-ended = "true";
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| H A D | realtek,rt5640.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Neil Armstrong <neil.armstrong@linaro.org> 39 - $ref: dai-common.yaml# 44 - realtek,rt5640 45 - realtek,rt5639 54 realtek,in1-differential: 56 Indicate MIC1 input is differential, rather than single-ended. 59 realtek,in2-differential: [all …]
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| H A D | nuvoton,nau8821.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Seven Lee <wtli@nuvoton.com> 13 - $ref: dai-common.yaml# 25 nuvoton,jkdet-enable: 29 nuvoton,jkdet-pull-enable: 30 description: Enable JKDET pin pull. If set - pin pull enabled, 34 nuvoton,jkdet-pull-up: 35 description: Pull-up JKDET pin. If set then JKDET pin is pull up, [all …]
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| H A D | ak4613.txt | 7 - compatible : "asahi-kasei,ak4613" 8 - reg : The chip select number on the I2C bus 11 - asahi-kasei,in1-single-end : Boolean. Indicate input / output pins are single-ended. 12 - asahi-kasei,in2-single-end rather than differential. 13 - asahi-kasei,out1-single-end 14 - asahi-kasei,out2-single-end 15 - asahi-kasei,out3-single-end 16 - asahi-kasei,out4-single-end 17 - asahi-kasei,out5-single-end 18 - asahi-kasei,out6-single-end [all …]
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| H A D | realtek,rt5677.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Animesh Agarwal <animeshagarwal28@gmail.com> 30 - $ref: dai-common.yaml# 42 gpio-controller: true 44 '#gpio-cells': 47 realtek,pow-ldo2-gpio: 51 realtek,reset-gpio: 55 realtek,gpio-config: [all …]
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| H A D | wm8994.txt | 8 - compatible : One of "wlf,wm1811", "wlf,wm8994" or "wlf,wm8958". 10 - reg : the I2C address of the device for I2C, the chip select 13 - gpio-controller : Indicates this device is a GPIO controller. 14 - #gpio-cells : Must be 2. The first cell is the pin number and the 17 - power supplies for the device, as covered in 20 - for wlf,wm1811 and wlf,wm8958: 21 AVDD1-supply, AVDD2-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply, 22 DCVDD-supply, CPVDD-supply, SPKVDD1-supply, SPKVDD2-supply 23 - for wlf,wm8994: 24 AVDD1-supply, AVDD2-supply, DBVDD-supply, DCVDD-supply, CPVDD-supply, [all …]
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| H A D | wlf,wm8994.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11 - patches@opensource.cirrus.com 25 - wlf,wm1811 26 - wlf,wm8994 27 - wlf,wm8958 36 clock-names: 39 - const: MCLK1 [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/hwmon/ |
| H A D | adc128d818.txt | 2 -------------------------------------------------------- 6 - Mode 0: 7 single-ended voltage readings (IN0-IN6), 8 - Mode 1: 8 single-ended voltage readings (IN0-IN7), 10 - Mode 2: 4 pseudo-differential voltage readings 11 (IN0-IN1, IN3-IN2, IN4-IN5, IN7-IN6), 13 - Mode 3: 4 single-ended voltage readings (IN0-IN3), 14 2 pseudo-differential voltage readings 15 (IN4-IN5, IN7-IN6), 24 - compatible: must be set to "ti,adc128d818" 25 - reg: I2C address of the device [all …]
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| H A D | ti,adc128d818.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Javier Carrasco <javier.carrasco.cruz@gmail.com> 13 The ADC128D818 is a 12-Bit, 8-Channel Analog to Digital Converter (ADC) 30 Mode 0 - 7 single-ended voltage readings (IN0-IN6), 1 temperature 32 Mode 1 - 8 single-ended voltage readings (IN0-IN7), no temperature. 33 Mode 2 - 4 pseudo-differential voltage readings 34 (IN0-IN1, IN3-IN2, IN4-IN5, IN7-IN6), 1 temperature reading (internal). 35 Mode 3 - 4 single-ended voltage readings (IN0-IN3), 2 pseudo-differential [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | adi,ad7173.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Ceclan Dumitru <dumitru.ceclan@analog.com> 15 The AD717x family offer a complete integrated Sigma-Delta ADC solution which 16 can be used in high precision, low noise single channel applications 18 (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended 23 The AD411X family encompasses a series of low power, low noise, 24-bit, 24 sigma-delta analog-to-digital converters that offer a versatile range of 26 fully differential/single-ended and bipolar voltage inputs. [all …]
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| H A D | adc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jonathan Cameron <jic23@kernel.org> 17 pattern: "^channel(@[0-9a-f]+)?$" 31 diff-channels: 32 $ref: /schemas/types.yaml#/definitions/uint32-array 43 the 'reg' property for both inputs (i.e. diff-channels = <reg reg>). 45 single-channel: 48 When devices combine single-ended and differential channels, allow the [all …]
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| H A D | st,stm32-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 STM32 ADC is a successive approximation analog-to-digital converter. 12 in single, continuous, scan or discontinuous mode. Result of the ADC is 13 stored in a left-aligned or right-aligned 32-bit data register. 17 voltage goes beyond the user-defined, higher or lower thresholds. 22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 27 - st,stm32f4-adc-core [all …]
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| H A D | ti,ads1119.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com> 13 The TI ADS1119 is a precision 16-bit ADC over I2C that offers single-ended and 28 reset-gpios: 31 avdd-supply: true 32 dvdd-supply: true 34 vref-supply: 38 "#address-cells": [all …]
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| H A D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 11 - Olivier Moysan <olivier.moysan@foss.st.com> 14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to 17 - Sigma delta modulators (motor control, metering...) 18 - PDM microphones (audio digital microphone) 28 - st,stm32h7-dfsdm [all …]
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| H A D | adi,ad7606.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michael Hennerich <michael.hennerich@analog.com> 14 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf 15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf 16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf 17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-16.pdf 18 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-18.pdf 19 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7607.pdf [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/iio/frequency/ |
| H A D | adi,admv1013.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
| H A D | adi,admv1014.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
| H A D | adi,admv4420.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nuno Sá <nuno.sa@analog.com> 14 mixer with an integrated fractional-N synthesizer, ideally suited 20 - adi,admv4420 25 spi-max-frequency: 28 adi,lo-freq-khz: 32 adi,ref-ext-single-ended-en: 37 - compatible [all …]
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| /freebsd/share/man/man4/ |
| H A D | pcf8591.4 | 2 .\" SPDX-License-Identifier: BSD-2-Clause 32 .Nd driver for the PCF8591 8-bit A/D and D/A converter 37 .Bd -ragged -offset indent 45 .Bd -literal -offset indent 53 .Bl -bullet 55 four single-ended inputs 59 two single-ended inputs and one differential input 71 .Bl -tag -width inputs.%d 80 .Bl -tag -width "compatible" 86 It should be in the range from 0x40 to 0x4f (7-bit). [all …]
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| /freebsd/sys/contrib/device-tree/include/dt-bindings/gpio/ |
| H A D | gpio.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ 17 /* Bit 1 express single-endedness */ 26 * Open Drain/Collector is the combination of single-ended open drain interface. 27 * Open Source/Emitter is the combination of single-ended open source interface.
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| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | st,stm32mp25-combophy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/st,stm32mp25-combophy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Christian Bruel <christian.bruel@foss.st.com> 13 Single lane PHY shared (exclusive) between the USB3 and PCIe controllers. 18 const: st,stm32mp25-combophy 23 "#phy-cells": 29 - description: apb Bus clock mandatory to access registers. 30 - description: ker Internal RCC reference clock for USB3 or PCIe [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/dpll/ |
| H A D | microchip,zl30731.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ivan Vecera <ivecera@redhat.com> 15 single-ended inputs and 10 differential or 20 single-ended outputs. 21 - microchip,zl30731 22 - microchip,zl30732 23 - microchip,zl30733 24 - microchip,zl30734 25 - microchip,zl30735 [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3588-jaguar-ethernet-switch.dtso | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * (manual: https://embedded.cherry.de/jaguar-ethernet-switch-user-manual/) 10 * two user controllable LEDs, and an M12 12-pin connector which exposes the 12 * - RS232/RS485 (max 250Kbps/500Kbps, RX pin1, TX pin2) 13 * - two digital inputs (pin4 routed to GPIO3_C5 on SoC, pin5 to GPIO4_B4) 14 * - two digital outputs (pin7 routed to GPIO3_D3 on SoC, pin8 to GPIO3_D1) 15 * - two analog inputs (pin10 to channel1 of ADS1015, pin11 to channel2) 17 * RK3588 Jaguar can be powered entirely through the adapter via the M8 3-pin 18 * connector (12-24V). 21 /dts-v1/; [all …]
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