xref: /freebsd/sys/contrib/device-tree/Bindings/sound/wlf,wm8994.yaml (revision fac71e4e09885bb2afa3d984a0c239a52e1a7418)

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8994.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Wolfson WM1811/WM8994/WM8958 audio codecs

maintainers:
  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
  - patches@opensource.cirrus.com

description: |
  These devices support both I2C and SPI (configured with pin strapping on the
  board).

  Pins on the device (for linking into audio routes):
  IN1LN, IN1LP, IN2LN, IN2LP:VXRN, IN1RN, IN1RP, IN2RN, IN2RP:VXRP, SPKOUTLP,
  SPKOUTLN, SPKOUTRP, SPKOUTRN, HPOUT1L, HPOUT1R, HPOUT2P, HPOUT2N, LINEOUT1P,
  LINEOUT1N, LINEOUT2P, LINEOUT2N.

properties:
  compatible:
    enum:
      - wlf,wm1811
      - wlf,wm8994
      - wlf,wm8958

  reg:
    maxItems: 1

  clocks:
    minItems: 1
    maxItems: 2

  clock-names:
    minItems: 1
    items:
      - const: MCLK1
      - const: MCLK2

  gpio-controller: true

  '#gpio-cells':
    const: 2

  interrupts:
    maxItems: 1

  interrupt-controller: true

  '#interrupt-cells':
    const: 2
    description:
      The first cell is the IRQ number. The second cell is the flags, encoded
      as the trigger masks.

  AVDD1-supply: true
  AVDD2-supply: true
  CPVDD-supply: true
  DBVDD-supply: true
  DBVDD1-supply: true
  DBVDD2-supply: true
  DBVDD3-supply: true
  DCVDD-supply: true
  LDO1VDD-supply: true
  LDO2VDD-supply: true
  SPKVDD1-supply: true
  SPKVDD2-supply: true

  '#sound-dai-cells':
    const: 0

  wlf,gpio-cfg:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    maxItems: 11
    description:
      A list of GPIO configuration register values. If absent, no configuration
      of these registers is performed. If any value is over 0xffff then the
      register will be left as default. If present 11 values must be supplied.

  wlf,micbias-cfg:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    maxItems: 2
    description:
      Two MICBIAS register values for WM1811 or WM8958.  If absent the register
      defaults will be used.

  wlf,ldo1ena-gpios:
    maxItems: 1
    description:
      Control of LDO1ENA input to device.

  wlf,ldo2ena-gpios:
    maxItems: 1
    description:
      Control of LDO2ENA input to device.

  wlf,lineout1-se:
    type: boolean
    description:
      LINEOUT1 is in single ended mode.

  wlf,lineout2-se:
    type: boolean
    description:
      INEOUT2 is in single ended mode.

  wlf,lineout1-feedback:
    type: boolean
    description:
      LINEOUT1 has common mode feedback connected.

  wlf,lineout2-feedback:
    type: boolean
    description:
      LINEOUT2 has common mode feedback connected.

  wlf,ldoena-always-driven:
    type: boolean
    description:
      LDOENA is always driven.

  wlf,spkmode-pu:
    type: boolean
    description:
      Enable the internal pull-up resistor on the SPKMODE pin.

  wlf,csnaddr-pd:
    type: boolean
    description:
      Enable the internal pull-down resistor on the CS/ADDR pin.

required:
  - compatible
  - reg
  - AVDD2-supply
  - CPVDD-supply
  - SPKVDD1-supply
  - SPKVDD2-supply

allOf:
  - $ref: dai-common.yaml#
  - if:
      properties:
        compatible:
          enum:
            - wlf,wm1811
            - wlf,wm8958
    then:
      properties:
        DBVDD-supply: false
        LDO2VDD-supply: false
      required:
        - DBVDD1-supply
        - DBVDD2-supply
        - DBVDD3-supply
    else:
      properties:
        DBVDD1-supply: false
        DBVDD2-supply: false
        DBVDD3-supply: false
      required:
        - DBVDD-supply

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    i2c {
        #address-cells = <1>;
        #size-cells = <0>;

        audio-codec@1a {
            compatible = "wlf,wm1811";
            reg = <0x1a>;
            clocks = <&i2s0 0>;
            clock-names = "MCLK1";

            AVDD2-supply = <&main_dc_reg>;
            CPVDD-supply = <&main_dc_reg>;
            DBVDD1-supply = <&main_dc_reg>;
            DBVDD2-supply = <&main_dc_reg>;
            DBVDD3-supply = <&main_dc_reg>;
            LDO1VDD-supply = <&main_dc_reg>;
            SPKVDD1-supply = <&main_dc_reg>;
            SPKVDD2-supply = <&main_dc_reg>;

            wlf,ldo1ena-gpios = <&gpb0 0 GPIO_ACTIVE_HIGH>;
            wlf,ldo2ena-gpios = <&gpb0 1 GPIO_ACTIVE_HIGH>;
        };
    };