single\-bit (full) in projects: freebsd

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/freebsd/sys/contrib/device-tree/Bindings/edac/
H A D	socfpga-eccmgr.txt	3 The ECC Manager counts and corrects single bit errors and counts/handles 4 double bit errors which are uncorrectable. 8 - compatible : Should be "altr,socfpga-ecc-manager" 9 - #address-cells: must be 1 10 - #size-cells: must be 1 11 - ranges : standard definition, should translate from local addresses 17 - compatible : Should be "altr,socfpga-l2-ecc" 18 - reg : Address and size for ECC error interrupt clear registers. 19 - interrupts : Should be single bit error interrupt, then double bit error 24 - compatible : Should be "altr,socfpga-ocram-ecc" [all …]
/freebsd/share/man/man9/
H A D	ieee80211_radiotap.9	60 layer used by 802.11 drivers includes support for a device-independent 68 Radiotap was designed to balance the desire for a hardware-independent, 93 With radiotap setup, drivers just need to fill in per-packet 105 .Bd -literal -offset indent 115 .Bd -literal -offset indent 129 .Bl -tag -width indent 131 This field contains the unsigned 64-bit value, in microseconds, 134 when the first bit of the MPDU arrived at the MAC. 138 This field contains a single unsigned 8-bit value, containing one or 139 more of these bit flags: [all …]
/freebsd/contrib/llvm-project/clang/lib/Headers/
H A D	avxneconvertintrin.h	1 /===-------------- avxneconvertintrin.h - AVXNECONVERT --------------------=== 5 SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 *===-----------------------------------------------------------------------=== 28 /// Convert scalar BF16 (16-bit) floating-point element 30 /// single-precision (32-bit) floating-point, broadcast it to packed 31 /// single-precision (32-bit) floating-point elements, and store the results in 43 /// A pointer to a 16-bit memory location. The address of the memory 46 /// A 128-bit vector of [4 x float]. 61 /// Convert scalar BF16 (16-bit) floating-point element 63 /// single-precision (32-bit) floating-point, broadcast it to packed [all …]
H A D	raointintrin.h	1 /===----------------------- raointintrin.h - RAOINT ------------------------=== 5 SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 *===-----------------------------------------------------------------------=== 20 /// Atomically add a 32-bit value at memory operand \a __A and a 32-bit \a __B, 24 /// result in bad performance for hot data used by single thread only. 31 /// A pointer to a 32-bit memory location. 33 /// A 32-bit integer value. 42 /// Atomically and a 32-bit value at memory operand \a __A and a 32-bit \a __B, 46 /// result in bad performance for hot data used by single thread only. 53 /// A pointer to a 32-bit memory location. [all …]
H A D	f16cintrin.h	1 /===---- f16cintrin.h - F16C intrinsics -----------------------------------=== 5 SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 ===-----------------------------------------------------------------------=== 23 / NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h, 28 /// Converts a 16-bit half-precision float value into a 32-bit float 36 /// A 16-bit half-precision float value. 37 /// \returns The converted 32-bit float value. 46 /// Converts a 32-bit single-precision float value to a 16-bit 47 /// half-precision float value. 58 /// A 32-bit single-precision float value to be converted to a 16-bit [all …]
/freebsd/sys/contrib/device-tree/Bindings/
H A D	trivial-devices.yaml	`1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/trivial-devices.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 27 spi-max-frequency: true 32 - enum: 34 - acbel,fsg032 35 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin 36 - ad,ad7414 # Deprecated, use adi,ad7414 [all …]`
/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A D	floating-point.json	3 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision float… 8 …-bit packed computational double precision floating-point instructions retired; some instructions … 13 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision float… 18 …-bit packed computational single precision floating-point instructions retired; some instructions … 23 …"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision float… 28 …-bit packed double computational precision floating-point instructions retired; some instructions … 33 …"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision float… 38 …-bit packed single computational precision floating-point instructions retired; some instructions … 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 48 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A D	floating-point.json	3 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision float… 8 …-bit packed computational double precision floating-point instructions retired; some instructions … 13 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision float… 18 …-bit packed computational single precision floating-point instructions retired; some instructions … 23 …"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision float… 28 …-bit packed double computational precision floating-point instructions retired; some instructions … 33 …"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision float… 38 …-bit packed single computational precision floating-point instructions retired; some instructions … 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 48 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/
H A D	floating-point.json	15 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 21 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 26 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 32 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 37 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 48 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 54 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 59 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 65 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/
H A D	floating-point.json	15 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 21 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 26 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 32 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 37 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 48 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 54 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 59 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 65 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/
H A D	floating-point.json	14 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 20 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 25 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 31 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 36 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 42 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 47 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 53 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 58 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 64 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A D	omap3-gta04.dtsi	`1 // SPDX-License-Identifier: GPL-2.0-only 5 * Based on omap3-beagle-xm.dts 7 /dts-v1/; 10 #include <dt-bindings/input/input.h> 17 cpu0-supply = <&vcc>; 27 stdout-pat 668 #define BIT( global() macro [all...]`
H A D	omap3-tao3530.dtsi	`1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 26 cpu0-supply = <&vcc>; 37 compatible = "regulator-fixed"; 38 regulator-name = "hsusb2_vbus"; 39 regulator-min-microvolt = <3300000>; 40 regulator-max-microvolt = <3300000>; 42 startup-delay-us = <70000>; 46 hsusb2_phy: hsusb2-phy-pins { [all …]`
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A D	pinctrl-single.txt	1 One-register-per-pin type device tree based pinctrl driver 4 - compatible : "pinctrl-single" or "pinconf-single". 5 "pinctrl-single" means that pinconf isn't supported. 6 "pinconf-single" means that generic pinconf is supported. 8 - reg : offset and length of the register set for the mux registers 10 - #pinctrl-cells : number of cells in addition to the index, set to 1 11 or 2 for pinctrl-single,pins and set to 2 for pinctrl-single,bits 13 - pinctrl-single,register-width : pinmux register access width in bits 15 - pinctrl-single,function-mask : mask of allowed pinmux function bits 19 - pinctrl-single,function-off : function off mode for disabled state if [all …]
H A D	pinctrl-single.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic Pin Controller with a Single Register for One or More Pins 10 - Tony Lindgren <tony@atomide.com> 13 Some pin controller devices use a single register for one or more pins. The 21 - enum: 22 - pinctrl-single 23 - pinconf-single [all …]`
/freebsd/lib/libpmc/pmu-events/arch/x86/skylake/
H A D	floating-point.json	3 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision float… 8 …-bit packed computational double precision floating-point instructions retired; some instructions … 13 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision float… 18 …-bit packed computational single precision floating-point instructions retired; some instructions … 23 …"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision float… 28 …-bit packed double computational precision floating-point instructions retired; some instructions … 33 …"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision float… 38 …-bit packed single computational precision floating-point instructions retired; some instructions … 43 …": "Counts once for most SIMD scalar computational double precision floating-point instructions re… 48 …-point instructions retired; some instructions will count twice as noted below. Each count repres… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/
H A D	floating-point.json	65 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 71 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 76 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 82 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 87 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 93 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 98 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 104 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 109 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 115 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
/freebsd/contrib/libcxxrt/
H A D	guard.cc	2 * Copyright 2010-2012 PathScale, Inc. All rights reserved. 29 * guard.cc: Functions for thread-safe static initialisation. 37 * Statics that require initialisation are protected by a 64-bit value. Any 38 * platform that can do 32-bit atomic test and set operations can use this 39 * value as a low-overhead lock. Because statics (in most sane code) are 57 // x86 and ARM are the most common little-endian CPUs, so let's have a 66 * The Itanium C++ ABI defines guard words that are 64-bit (32-bit on AArch32) 67 * values with one bit defined to indicate that the guarded variable is and 68 * another bit to indicate that it's currently locked (initialisation in 69 * progress). The bit to use depends on the byte order of the target. [all …]
/freebsd/sys/contrib/device-tree/include/dt-bindings/gpio/
H A D	gpio.h	1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) / 13 / Bit 0 express polarity / 17 / Bit 1 express single-endedness / 21 / Bit 2 express Open drain or open source / 26 Open Drain/Collector is the combination of single-ended open drain interface. 27 * Open Source/Emitter is the combination of single-ended open source interface. 32 /* Bit 3 express GPIO suspend/resume and reset persistence / 36 / Bit 4 express pull up / 39 / Bit 5 express pull down / 42 / Bit 6 express pull disable */
/freebsd/sys/contrib/device-tree/Bindings/timer/
H A D	nvidia,tegra-timer.yaml	`1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Warren <swarren@nvidia.com> 13 - if: 17 const: nvidia,tegra210-timer 21 # Either a single combined interrupt or up to 14 individual interrupts 27 - if: 31 - items: [all …]`
/freebsd/sys/net/
H A D	sff8472.h	`1 /- 2 SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2013 George V. Neville-Neil 30 * The following set of constants are from Document SFF-8472 40 * 0-95 Serial ID Defined by SFP MSA 41 * 96-127 Vendor Specific Data 42 * 128-255 Reserved 45 * 0-55 Alarm and Warning Thresholds 46 * 56-95 Cal Constants 47 * 96-119 Real Time Diagnostic Interface [all …]`
/freebsd/sys/contrib/openzfs/include/sys/
H A D	brt_impl.h	1 // SPDX-License-Identifier: CDDL-1.0 10 * or https://opensource.org/licenses/CDDL-1.0. 34 * BRT - Block Reference Table. 40 * by a 16bit counter, thus 1TB VDEV requires 128kB of memory: (1TB / 16MB) * 2B 49 * many for a 16bit counter. 56 * of dirty blocks within the regions, so that a single bit represents a 60 * the whole 128MB on disk when we have updated only a single entcount. 62 * is represented by a single bit. This gives us 4096 bits. A set bit in the 68 (((size) - 1) / BRT_BLOCKSIZE / sizeof (uint16_t) + 1) 135 * bv_entcount[] potentially can be a bit too big to sychronize it all [all …]
/freebsd/sys/contrib/ck/include/
H A D	ck_ec.h	31 * ck_ec implements 32- and 64- bit event counts. Event counts let us 32 * easily integrate OS-level blocking (e.g., futexes) in lock-free 36 * Event counts come in four variants: 32 and 64 bit (with one bit 37 * stolen for internal signaling, so 31 and 63 bit counters), and 38 * single or multiple producers (wakers). Waiters are always multiple 39 * consumers. The 32 bit variants are smaller, and more efficient, 40 * especially in single producer mode. The 64 bit variants are larger, 43 * The 32 bit variant is always available. The 64 bit variant is only 44 * available if CK supports 64-bit atomic operations. Currently, 45 * specialization for single producer is only implemented for x86 and [all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A D	TargetSchedule.td	1 //===- TargetSchedule.td - Target Independent Scheduling ---- tablegen --===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 // This file defines the target-independent scheduling interfaces which should 14 // 2. Scheduler Read/Write resources for simple per-opcode cost model. 21 // (2) A per-operand machine model can be implemented in any 24 // A. Associate per-operand SchedReadWrite types with Instructions by 31 // per-operand SchedReadWrite types. Unlike method A, these types may 45 // a machine-independent SchedReadWrite type to map to a sequence of 46 // machine-dependent types. [all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A D	qcom,coresight-tpdm.yaml	1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 4 --- 5 $id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Trace, Profiling and Diagnostics Monitor - TPDM 13 Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete 14 Single Bit (DSB). It performs data collection in the data producing clock 22 - Mao Jinlong <quic_jinlmao@quicinc.com> 23 - Tao Zhang <quic_taozha@quicinc.com> 31 - qcom,coresight-tpdm [all …]

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