| /freebsd/sys/contrib/ncsw/inc/flib/ |
| H A D | fsl_enet.h | 48 E_ENET_IF_SGMII = 0x00080000, /**< SGMII interface */
177 /**< SGMII/QSGII interface with 1000BaseX auto-negotiation between MAC
180 and phy/backplane, SGMII phy can still synchronize with far-end phy at
211 /**< 10 Mbps SGMII with auto-negotiation between MAC and
212 SGMII phy according to Cisco SGMII specification */
214 /**< 100 Mbps SGMII with auto-negotiation between MAC and
215 SGMII phy according to Cisco SGMII specification */
217 /**< 1000 Mbps SGMII with auto-negotiation between MAC and
218 SGMII phy according to Cisco SGMII specification */
221 /**< 10 Mbps SGMII with 1000BaseX auto-negotiation between
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | socfpga-dwmac.txt | 27 altr,sgmii-to-sgmii-converter: phandle to the TSE SGMII converter
29 This device node has additional phandle dependency, the sgmii converter:
32 - compatible : Should be altr,gmii-to-sgmii-2.0
38 compatible = "altr,gmii-to-sgmii-2.0";
55 phy-mode = "sgmii";
56 altr,gmii-to-sgmii-converter = <&gmii_to_sgmii_converter>;
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| H A D | qcom-emac.txt | 3 This network controller consists of two devices: a MAC and an SGMII
20 - compatible : Should be "qcom,fsm9900-emac-sgmii" or "qcom,qdf2432-emac-sgmii".
61 compatible = "qcom,fsm9900-emac-sgmii";
107 compatible = "qcom,qdf2432-emac-sgmii";
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| H A D | mediatek-net.txt | 37 SGMII setup which is required for those SoCs equipped with SGMII such
38 as MT7622 and MT7629 SoC. And MT7622 have only one set of SGMII shared
39 by GMAC1 and GMAC2; MT7629 have two independent sets of SGMII directed
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| H A D | xlnx,axi-ethernet.yaml | 12 interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. It also includes two
63 - sgmii
88 xlnx,switch-x-sgmii:
92 SGMII modes. If set, the phy-mode should be set to match the mode
121 description: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
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| H A D | xilinx_axienet.txt | 6 interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. It also includes two
42 - xlnx,switch-x-sgmii : Boolean to indicate the Ethernet core is configured to
43 support both 1000BaseX and SGMII modes. If set, the phy-mode
74 - pcs-handle: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
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| /freebsd/sys/contrib/ncsw/inc/ |
| H A D | enet_ext.h | 76 e_ENET_IF_SGMII = E_ENET_IF_SGMII, /**< SGMII interface */
82 #define ENET_IF_SGMII_BASEX 0x80000000 /**< SGMII/QSGII interface with 1000BaseX
87 SGMII phy can still synchronize with far-end phy
130 /**< 10 Mbps SGMII with auto-negotiation between MAC and
131 SGMII phy according to Cisco SGMII specification */
133 /**< 100 Mbps SGMII with auto-negotiation between MAC and
134 SGMII phy according to Cisco SGMII specification */
136 /**< 1000 Mbps SGMII with auto-negotiation between MAC and
137 SGMII phy according to Cisco SGMII specification */
140 /**< 10 Mbps SGMII with 1000BaseX auto-negotiation between
[all …]
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| /freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
| H A D | p5040ds.dts | 179 phy-connection-type = "sgmii";
183 phy-connection-type = "sgmii";
187 phy-connection-type = "sgmii";
191 phy-connection-type = "sgmii";
207 phy-connection-type = "sgmii";
211 phy-connection-type = "sgmii";
215 phy-connection-type = "sgmii";
219 phy-connection-type = "sgmii";
314 hydra_sg_slot2: sgmii-mdio@28 {
337 hydra_sg_slot3: sgmii
[all...] |
| H A D | t4240rdb.dts | 157 phy-connection-type = "sgmii";
162 phy-connection-type = "sgmii";
167 phy-connection-type = "sgmii";
172 phy-connection-type = "sgmii";
197 phy-connection-type = "sgmii";
202 phy-connection-type = "sgmii";
207 phy-connection-type = "sgmii";
212 phy-connection-type = "sgmii";
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| H A D | p4080ds.dts | 197 phy-connection-type = "sgmii";
202 phy-connection-type = "sgmii";
207 phy-connection-type = "sgmii";
212 phy-connection-type = "sgmii";
224 phy-connection-type = "sgmii";
229 phy-connection-type = "sgmii";
234 phy-connection-type = "sgmii";
239 phy-connection-type = "sgmii";
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| H A D | t4240qds.dts | 481 phy-connection-type = "sgmii";
486 phy-connection-type = "sgmii";
491 phy-connection-type = "sgmii";
496 phy-connection-type = "sgmii";
506 phy-connection-type = "sgmii";
557 phy-connection-type = "sgmii";
562 phy-connection-type = "sgmii";
567 phy-connection-type = "sgmii";
572 phy-connection-type = "sgmii";
582 phy-connection-type = "sgmii";
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/net/dsa/ |
| H A D | qca8k.yaml | 85 qca,sgmii-rxclk-falling-edge:
89 the QCA8327 with CPU port 0 set to SGMII.
91 qca,sgmii-txclk-falling-edge:
96 qca,sgmii-enable-pll:
99 For SGMII CPU port, explicitly enable PLL, TX and RX chain along with
101 the SGMII port will not initialize. When used on the QCA8337, revision 3
103 SGMII on the QCA8337, it is advised to set this unless a communication
285 phy-mode = "sgmii";
287 qca,sgmii-rxclk-falling-edge;
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-ls1046a-qds.dts | 35 sgmii-s1-p1 = &sgmii_phy_s1_p1;
36 sgmii-s1-p2 = &sgmii_phy_s1_p2;
37 sgmii-s1-p3 = &sgmii_phy_s1_p3;
38 sgmii-s1-p4 = &sgmii_phy_s1_p4;
39 sgmii-s4-p1 = &sgmii_phy_s4_p1;
197 phy-connection-type = "sgmii";
202 phy-connection-type = "sgmii";
217 phy-connection-type = "sgmii";
222 phy-connection-type = "sgmii";
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| H A D | fsl-ls1043a-qds.dts | 27 sgmii-riser-s1-p1 = &sgmii_phy_s1_p1;
28 sgmii-riser-s2-p1 = &sgmii_phy_s2_p1;
29 sgmii-riser-s3-p1 = &sgmii_phy_s3_p1;
30 sgmii-riser-s4-p1 = &sgmii_phy_s4_p1;
179 phy-connection-type = "sgmii";
184 phy-connection-type = "sgmii";
199 phy-connection-type = "sgmii";
204 phy-connection-type = "sgmii";
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| H A D | fsl-lx2162a-clearfog.dts | 118 phy-connection-type = "sgmii";
125 phy-connection-type = "sgmii";
132 phy-connection-type = "sgmii";
139 phy-connection-type = "sgmii";
146 phy-connection-type = "sgmii";
153 phy-connection-type = "sgmii";
164 phy-connection-type = "sgmii";
171 phy-connection-type = "sgmii";
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| H A D | fsl-ls1028a-qds-9999.dts | 40 phy-mode = "sgmii";
47 phy-mode = "sgmii";
54 phy-mode = "sgmii";
61 phy-mode = "sgmii";
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| H A D | fsl-ls1028a-qds-9999.dtso | 40 phy-mode = "sgmii";
47 phy-mode = "sgmii";
54 phy-mode = "sgmii";
61 phy-mode = "sgmii";
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| H A D | fsl-ls1028a-qds-899b.dts | 38 phy-mode = "sgmii";
47 phy-mode = "sgmii";
54 phy-mode = "sgmii";
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| H A D | fsl-ls1028a-qds-899b.dtso | 38 phy-mode = "sgmii";
47 phy-mode = "sgmii";
54 phy-mode = "sgmii";
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| H A D | fsl-ls1043-post.dtsi | 33 pcs-handle-names = "sgmii", "qsgmii";
45 pcs-handle-names = "sgmii", "qsgmii";
51 pcs-handle-names = "sgmii", "qsgmii";
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| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | qcom,sa8775p-dwmac-sgmii-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml#
7 title: Qualcomm SerDes/SGMII ethernet PHY controller
18 const: qcom,sa8775p-dwmac-sgmii-phy
50 compatible = "qcom,sa8775p-dwmac-sgmii-phy";
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| /freebsd/sys/contrib/device-tree/src/mips/cavium-octeon/ |
| H A D | octeon_68xx.dts | 74 cavium,qlm-trim = "4,sgmii";
83 cavium,qlm-trim = "4,sgmii";
92 cavium,qlm-trim = "4,sgmii";
101 cavium,qlm-trim = "4,sgmii";
118 cavium,qlm-trim = "0,sgmii";
127 cavium,qlm-trim = "0,sgmii";
136 cavium,qlm-trim = "0,sgmii";
145 cavium,qlm-trim = "0,sgmii";
162 cavium,qlm-trim = "2,sgmii";
171 cavium,qlm-trim = "2,sgmii";
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm958625-meraki-alamo.dtsi | 119 phy-mode = "sgmii";
120 qca,sgmii-enable-pll;
121 qca,sgmii-txclk-falling-edge;
197 phy-mode = "sgmii";
198 qca,sgmii-enable-pll;
199 qca,sgmii-txclk-falling-edge;
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| /freebsd/sys/contrib/device-tree/src/mips/mscc/ |
| H A D | ocelot_pcb120.dts | 98 phy-mode = "sgmii";
105 phy-mode = "sgmii";
112 phy-mode = "sgmii";
119 phy-mode = "sgmii";
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| /freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | cn9131-cf-solidwan.dts | 159 /* SRDS #3 - SGMII 1GE */
162 phy-mode = "sgmii";
163 /* Without mdio phy access rely on sgmii auto-negotiation. */
168 /* SRDS #1 - SGMII */
173 phy-mode = "sgmii";
273 * SGMII Auto-Negotation is enabled by bootloader for
433 /* SRDS #3 - SGMII 1GE */
436 phy-mode = "sgmii";
442 /* SRDS #5 - SGMII 1GE */
445 phy-mode = "sgmii";
|