Searched full:serdes_wiz0 (Results 1 – 10 of 10) sorted by relevance
20 serdes_wiz0: phy@f000000 { label39 resets = <&serdes_wiz0 0>;41 clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,42 <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>;44 assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,45 <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>,46 <&serdes_wiz0 TI_WIZ_REFCLK_DIG>;
74 * Assign pcie_refclk0 to serdes_wiz0 as ext_ref_clk.77 &serdes_wiz0 {
114 &serdes_wiz0 {131 resets = <&serdes_wiz0 2>;
710 resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;719 resets = <&serdes_wiz0 3>;
518 &serdes_wiz0 {530 resets = <&serdes_wiz0 1>;
440 resets = <&serdes_wiz0 1>;
809 resets = <&serdes_wiz0 1>;
839 resets = <&serdes_wiz0 1>;
1182 resets = <&serdes_wiz0 1>;
254 resets = <&serdes_wiz0 0>;