Searched +full:select +full:- +full:utmi +full:- +full:as +full:- +full:pipe +full:- +full:clk (Results 1 – 15 of 15) sorted by relevance
| /linux/drivers/usb/dwc3/ |
| H A D | dwc3-qcom-legacy.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Inspired by dwc3-of-simple.c 10 #include <linux/clk.h> 77 struct clk **clks; 122 dwc3_qcom_setbits(qcom->qscratch_base, QSCRATCH_SS_PHY_CTRL, in dwc3_qcom_vbus_override_enable() 124 dwc3_qcom_setbits(qcom->qscratch_base, QSCRATCH_HS_PHY_CTRL, in dwc3_qcom_vbus_override_enable() 127 dwc3_qcom_clrbits(qcom->qscratch_base, QSCRATCH_SS_PHY_CTRL, in dwc3_qcom_vbus_override_enable() 129 dwc3_qcom_clrbits(qcom->qscratch_base, QSCRATCH_HS_PHY_CTRL, in dwc3_qcom_vbus_override_enable() 141 qcom->mode = event ? USB_DR_MODE_PERIPHERAL : USB_DR_MODE_HOST; in dwc3_qcom_vbus_notifier() 153 qcom->mode = event ? USB_DR_MODE_HOST : USB_DR_MODE_PERIPHERAL; in dwc3_qcom_host_notifier() [all …]
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | qcom,snps-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wesley Cheng <quic_wcheng@quicinc.com> 15 select: 19 const: qcom,snps-dwc3 21 - compatible 26 - enum: 27 - qcom,ipq4019-dwc3 [all …]
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| H A D | qcom,dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wesley Cheng <quic_wcheng@quicinc.com> 12 # Use the combined qcom,snps-dwc3 instead 15 select: 21 - compatible 26 - enum: 27 - qcom,ipq4019-dwc3 28 - qcom,ipq5018-dwc3 [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sm7125-xiaomi-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/arm/qcom,ids.h> 9 #include <dt-bindings/firmware/qcom,scm.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 16 /delete-node/ &ipa_fw_mem; 17 /delete-node/ &rmtfs_mem; 20 chassis-type = "handset"; 22 qcom,msm-id = <QCOM_ID_SM7125 0>; [all …]
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| H A D | msm8998-oneplus-common.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * OnePlus 5(T) (cheeseburger / dumpling) common device tree source based on msm8998-mtp.dtsi 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 19 /* Required for bootloader to select correct board */ 20 qcom,msm-id = <292 0x20001>; /* 8998 v2.1 */ 23 #address-cells = <2>; 24 #size-cells = <2>; 29 compatible = "simple-framebuffer"; [all …]
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| H A D | sdm660-xiaomi-lavender.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/input/gpio-keys.h> 18 chassis-type = "handset"; 25 #address-cells = <2>; 26 #size-cells = <2>; 29 stdout-path = "serial0:115200n8"; 32 compatible = "simple-framebuffer"; 41 vph_pwr: vph-pwr-regulator { [all …]
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| H A D | msm8996-xiaomi-common.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 15 compatible = "gpio-gate-clock"; 17 #clock-cells = <0>; 18 enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>; 20 pinctrl-names = "default"; 21 pinctrl-0 = <&divclk1_default>; [all …]
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| H A D | msm8998-xiaomi-sagit.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Xiaomi Mi 6 (sagit) device tree source based on msm8998-mtp.dtsi 10 /dts-v1/; 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/leds/common.h> 18 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 24 /delete-node/ &adsp_mem; 25 /delete-node/ &mpss_mem; 26 /delete-node/ &venus_mem; 27 /delete-node/ &mba_mem; [all …]
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| H A D | sdm630-sony-xperia-nile.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/input/gpio-keys.h> 13 #include <dt-bindings/leds/common.h> 16 /* required for bootloader to select correct board */ 17 qcom,msm-id = <318 0>; 18 qcom,board-id = <8 1>; 19 qcom,pmic-id = <0x1001b 0x101011a 0x00 0x00 0x1001b 0x201011a 0x00 0x00>; 21 /* This part enables graphical output via bootloader-enabled display */ [all …]
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| H A D | msm8996-sony-xperia-tone.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 16 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 18 /delete-node/ &adsp_mem; 19 /delete-node/ &slpi_mem; 20 /delete-node/ &venus_mem; 21 /delete-node/ &gpu_mem; [all …]
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| H A D | sm8250-xiaomi-elish-common.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2022-2024 Jianhua Lu <lujianhua000@gmail.com> 6 #include <dt-bindings/arm/qcom,ids.h> 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9 #include <dt-bindings/usb/pd.h> 20 /delete-node/ &adsp_mem; 21 /delete-node/ &cdsp_secure_heap; 22 /delete-node/ &slpi_mem; 23 /delete-node/ &spss_mem; [all …]
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| H A D | sm6125.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,dispcc-sm6125.h> 7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 8 #include <dt-bindings/clock/qcom,gcc-sm6125.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/dma/qcom-gpi.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/power/qcom-rpmpd.h> 16 interrupt-parent = <&intc>; [all …]
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| H A D | sdm630.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 8 #include <dt-bindings/clock/qcom,gcc-sdm660.h> 9 #include <dt-bindings/clock/qcom,gpucc-sdm660.h> 10 #include <dt-bindings/clock/qcom,mmcc-sdm660.h> 11 #include <dt-bindings/clock/qcom,rpmcc.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/interconnect/qcom,sdm660.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> 15 #include <dt-bindings/gpio/gpio.h> [all …]
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| /linux/drivers/phy/samsung/ |
| H A D | phy-exynos5-usbdrd.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 #include <linux/clk.h> 25 #include <linux/soc/samsung/exynos-regs-pmu.h> 253 /* Exynos9 - GS101 */ 387 for (; (tune)->region != PTR_INVALID; ++(tune)) 441 * struct exynos5_usbdrd_phy - driver data for USB 3.0 PHY 447 * @core_clks: core clocks for phy (ref, pipe3, utmi+, ITP, etc. as required) 449 * @hs_phy: pointer to non-Samsung IP high-speed phy controller 453 * @extrefclk: frequency select settings when using 'separate 457 * @orientation: TypeC connector orientation - normal or flipped [all …]
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| /linux/drivers/phy/marvell/ |
| H A D | phy-mvebu-a3700-comphy.c | 1 // SPDX-License-Identifier: GPL-2.0 11 * Structure inspired from phy-mvebu-cp110-comphy.c written by Antoine Tenart. 17 #include <linux/clk.h> 41 * since the registers are 16-bit. 126 /* PIPE registers */ 184 #define COMPHY_PHY_REG(lane, reg) (((1 - (lane)) * 0x28) + ((reg) & 0x3f)) 301 /*-----------------------------------------------------------*/ 392 priv->lane2_phy_indirect + COMPHY_LANE2_INDIR_ADDR); in comphy_set_indirect() 393 comphy_reg_set(priv->lane2_phy_indirect + COMPHY_LANE2_INDIR_DATA, in comphy_set_indirect() 400 if (lane->id == 2) { in comphy_lane_reg_set() [all …]
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