| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | secure.txt | 1 * ARM Secure world bindings
4 "Normal" and "Secure". Most devicetree consumers (including the Linux
6 world or the Secure world. However some devicetree consumers are
8 visible only in the Secure address space, only in the Normal address
10 virtual machine which boots Secure firmware and wants to tell the
13 The general principle of the naming scheme for Secure world bindings
14 is that any property that needs a different value in the Secure world
15 can be supported by prefixing the property name with "secure-". So for
16 instance "secure-foo" would override "foo". For property names with
17 a vendor prefix, the Secure variant of "vendor,foo" would be
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| /linux/arch/powerpc/kvm/ |
| H A D | book3s_hv_uvmem.c | 3 * Secure pages management: Migration of pages between normal and secure
10 * A pseries guest can be run as secure guest on Ultravisor-enabled
13 * hypervisor (HV) and secure memory managed by Ultravisor (UV).
18 * Private ZONE_DEVICE memory equal to the amount of secure memory
19 * available in the platform for running secure guests is hotplugged.
20 * Whenever a page belonging to the guest becomes secure, a page from this
21 * private device memory is used to represent and track that secure page
36 * UV(secure) and vice versa. So the serialization points are around
40 * fault path as page-out can occur when HV faults on accessing secure
44 * by HV touching secure pages is very very low. If an when UV supports
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| /linux/Documentation/devicetree/bindings/crypto/ |
| H A D | inside-secure,safexcel.yaml | 4 $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
7 title: Inside Secure SafeXcel cryptographic engine
15 - const: inside-secure,safexcel-eip197b
16 - const: inside-secure,safexcel-eip197d
17 - const: inside-secure,safexcel-eip97ies
18 - const: inside-secure,safexcel-eip197
19 description: Equivalent of inside-secure,safexcel-eip197b
21 - const: inside-secure,safexcel-eip97
22 description: Equivalent of inside-secure,safexcel-eip97ies
75 compatible = "inside-secure,safexcel-eip197b";
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| /linux/arch/arm/common/ |
| H A D | secure_cntvoff.S | 5 * Initialization of CNTVOFF register from secure mode
15 * CNTVOFF has to be initialized either from non-secure Hypervisor
16 * mode or secure Monitor mode with SCR.NS==1. If TrustZone is enabled
17 * then it should be handled by the secure code. The CPU must implement
21 mrc p15, 0, r1, c1, c1, 0 /* Get Secure Config */
23 mcr p15, 0, r0, c1, c1, 0 /* Set Non Secure bit */
28 mcr p15, 0, r1, c1, c1, 0 /* Set Secure bit */
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| /linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | ti,secure-proxy.yaml | 4 $id: http://devicetree.org/schemas/mailbox/ti,secure-proxy.yaml#
7 title: Texas Instruments' Secure Proxy
13 The Texas Instruments' secure proxy is a mailbox controller that has
25 const: ti,am654-secure-proxy
30 Contains the secure proxy thread ID used for the specific transfer path.
48 secure proxy thread in the form 'rx_<PID>'.
54 Contains the interrupt information for the Rx interrupt path for secure
71 compatible = "ti,am654-secure-proxy";
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| /linux/arch/arm/mach-omap2/ |
| H A D | omap-secure.h | 3 * omap-secure.h: OMAP Secure infrastructure header.
23 /* Secure HAL API flags */
30 /* Maximum Secure memory storage size */
35 /* Secure low power HAL API index */
41 /* Secure Monitor mode APIs */
52 /* Secure PPA(Primary Protected Application) APIs */
60 /* Secure RX-51 PPA (Primary Protected Application) APIs */
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| H A D | omap-smc.S | 3 * OMAP34xx and OMAP44xx secure APIs file.
15 * This is common routine to manage secure monitor API
16 * used to modify the PL310 secure registers.
36 * Low level common routine for secure HAL and PPA APIs.
48 mov r12, #0x00 @ Secure Service ID
59 * Low level common routine for secure HAL and PPA APIs via smc #1
60 * r0 - @service_id: Secure Service ID
67 mov r12, r0 @ Copy the secure service ID
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| H A D | omap-secure.c | 3 * OMAP Secure API infrastructure.
23 #include "omap-secure.h"
50 * omap_secure_dispatcher - Routine to dispatch low power secure
55 * @arg1, arg2, arg3 args4: Parameters passed to secure API
77 * Secure API needs physical address in omap_secure_dispatcher()
95 WARN(res.a0, "Secure function call 0x%08x failed\n", fn); in omap_smccc_smc()
110 /* Allocate the memory to save secure ram */
143 * rx51_secure_dispatcher: Routine to dispatch secure PPA API calls
148 * @arg1, arg2, arg3 args4: Parameters passed to secure API
168 * Secure API needs physical address in rx51_secure_dispatcher()
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| /linux/include/uapi/linux/ |
| H A D | nfc.h | 67 * @NFC_CMD_ENABLE_SE: Enable the physical link to a specific secure element.
68 * Once enabled a secure element will handle card emulation mode, i.e.
69 * starting a poll from a device which has a secure element enabled means
71 * @NFC_CMD_DISABLE_SE: Disable the physical link to a specific secure element.
74 * @NFC_EVENT_SE_ADDED: Event emitted when a new secure element is discovered.
77 * @NFC_EVENT_SE_REMOVED: Event emitted when a secure element is removed from
79 * @NFC_EVENT_SE_CONNECTIVITY: This event is emitted whenever a secure element
87 * @NFC_CMD_GET_SE: Dump all discovered secure elements from an NFC controller.
88 * @NFC_CMD_SE_IO: Send/Receive APDUs to/from the selected secure element.
154 * @NFC_ATTR_SE: Available Secure Elements
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| /linux/include/linux/firmware/intel/ |
| H A D | stratix10-smc.h | 13 * This file defines the Secure Monitor Call (SMC) message protocol used for
14 * service layer driver in normal world (EL1) to communicate with secure
15 * monitor software in Secure Monitor Exception Level 3 (EL3).
17 * This file is shared with secure firmware (FW) which is out of kernel tree.
21 * value. The operation of the secure monitor is determined by the parameter
31 * STD call starts a operation which can be preempted by a non-secure
54 * Secure monitor software doesn't recognize the request.
57 * Secure monitor software accepts the service client's request.
60 * Secure monitor software is still processing service client's request.
63 * Secure monitor software reject the service client's request.
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| /linux/Documentation/devicetree/bindings/arm/samsung/ |
| H A D | samsung-secure-firmware.yaml | 4 $id: http://devicetree.org/schemas/arm/samsung/samsung-secure-firmware.yaml#
7 title: Samsung Exynos Secure Firmware
15 - const: samsung,secure-firmware
19 Address of non-secure SYSRAM used for communication with firmware.
31 compatible = "samsung,secure-firmware";
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| /linux/include/net/ |
| H A D | macsec.h | 119 * struct macsec_rx_sa - receive secure association
124 * @ssci: short secure channel identifier
153 * struct macsec_rx_sc - receive secure channel
154 * @sci: secure channel identifier for this SC
156 * @sa: array of secure associations
170 * struct macsec_tx_sa - transmit secure association
175 * @ssci: short secure channel identifier
193 * struct macsec_tx_sc - transmit secure channel
200 * @sa: array of secure associations
219 * @n_rx_sc: number of receive secure channels configured on this SecY
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| /linux/arch/arm/mach-bcm/ |
| H A D | bcm_kona_smc.c | 52 pr_info("Kona Secure API initialized\n"); in bcm_kona_smc_init()
60 * Only core 0 can run the secure monitor code. If an "smc" request
67 * cache and interrupt handling while the secure monitor executes.
76 * First, the secure monitor call itself (regardless of the specific
132 /* Flush caches for input data passed to Secure Monitor */ in __bcm_kona_smc()
135 /* Trap into Secure Monitor and record the request result */ in __bcm_kona_smc()
152 * Due to a limitation of the secure monitor, we must use the SMP in bcm_kona_smc()
153 * infrastructure to forward all secure monitor calls to Core 0. in bcm_kona_smc()
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| /linux/Documentation/tee/ |
| H A D | amd-tee.rst | 8 TEE environment is provided by AMD Secure Processor.
10 The AMD Secure Processor (formerly called Platform Security Processor or PSP)
21 User space (Kernel space) | AMD Secure Processor (PSP)
44 At the lowest level (in x86), the AMD Secure Processor (ASP) driver uses the
47 the secure processor and return results to AMD-TEE driver. The interface
48 between AMD-TEE driver and AMD Secure Processor driver can be found in [1].
64 AMD-TEE Trusted OS is the firmware running on AMD Secure Processor.
79 talk to AMD's TEE. AMD's TEE provides a secure environment for loading, opening
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| H A D | op-tee.rst | 23 separate secure co-processor.
36 User space Kernel Secure world
56 RPC (Remote Procedure Call) are requests from secure world to kernel driver
74 There are two kinds of notifications that secure world can use to make
79 2. Asynchronous notifications delivered with a combination of a non-secure
80 edge-triggered interrupt and a fast call from the non-secure interrupt
84 this is only usable when secure world is entered with a yielding call via
85 ``OPTEE_SMC_CALL_WITH_ARG``. This excludes such notifications from secure
88 An asynchronous notification is delivered via a non-secure edge-triggered
98 building block for OP-TEE OS in secure world to implement the top half and
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| /linux/drivers/s390/crypto/ |
| H A D | zcrypt_ccamisc.h | 41 /* inside view of a CCA secure key token (only type 0x01 version 0x04) */
97 /* inside view of an CCA secure ECC private key */
133 * Simple check if the token is a valid CCA secure AES data key
141 * Simple check if the token is a valid CCA secure AES cipher key
152 * Simple check if the token is a valid CCA secure ECC private
160 * Generate (random) CCA AES DATA secure key.
165 * Generate CCA AES DATA secure key with given clear key value.
171 * Derive proteced key from an CCA AES DATA secure key.
178 * Generate (random) CCA AES CIPHER secure key.
184 * Derive proteced key from CCA AES cipher secure ke
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| /linux/drivers/firmware/meson/ |
| H A D | meson_sm.c | 3 * Amlogic Secure Monitor driver
92 * meson_sm_call - generic SMC32 call to the secure-monitor
94 * @fw: Pointer to secure-monitor firmware
128 * meson_sm_call_read - retrieve data from secure-monitor
130 * @fw: Pointer to secure-monitor firmware
184 * meson_sm_call_write - send data to secure-monitor
186 * @fw: Pointer to secure-monitor firmware
228 * @sm_node: Pointer to the secure-monitor Device Tree node.
230 * Return: NULL is the secure-monitor device is not ready.
323 pr_info("secure-monitor enabled\n"); in meson_sm_probe()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_securedisplay.c | 55 dev_err(psp->adev->dev, "Secure display: Generic Failure."); in psp_securedisplay_parse_resp_status()
58 dev_err(psp->adev->dev, "Secure display: Invalid Parameter."); in psp_securedisplay_parse_resp_status()
61 dev_err(psp->adev->dev, "Secure display: Null Pointer."); in psp_securedisplay_parse_resp_status()
64 dev_err(psp->adev->dev, "Secure display: Failed to write to I2C."); in psp_securedisplay_parse_resp_status()
67 dev_err(psp->adev->dev, "Secure display: Failed to Read DIO Scratch Register."); in psp_securedisplay_parse_resp_status()
70 dev_err(psp->adev->dev, "Secure display: Failed to Read CRC"); in psp_securedisplay_parse_resp_status()
73 dev_err(psp->adev->dev, "Secure display: Failed to initialize I2C."); in psp_securedisplay_parse_resp_status()
76 dev_err(psp->adev->dev, "Secure display: Failed to parse status: %d\n", status); in psp_securedisplay_parse_resp_status()
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| H A D | ta_secureDisplay_if.h | 27 /** Secure Display related enumerations */
31 * Secure Display Command ID
43 * Secure Display status returns in shared buffer status
71 * communication to Secure Display TA is functional.
88 /** Input/output structures for Secure Display commands */
143 * Secure display command which is shared buffer memory
147 … status; /**< +4 Bytes Status code returned by the secure display TA */
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| /linux/drivers/firmware/efi/libstub/ |
| H A D | secureboot.c | 3 * Secure boot handling.
26 * Determine whether we're in secure boot mode.
38 efi_err("Could not determine UEFI Secure Boot status.\n"); in efi_get_secureboot()
53 /* If it fails, we don't care why. Default to secure */ in efi_get_secureboot()
60 efi_info("UEFI Secure Boot is enabled.\n"); in efi_get_secureboot()
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| /linux/Documentation/devicetree/bindings/firmware/ |
| H A D | intel,stratix10-svc.txt | 4 processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
10 communication with SDM, only the secure world of software (EL3, Exception
18 driver also manages secure monitor call (SMC) to communicate with secure monitor
28 smc - Secure Monitor Call
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| /linux/drivers/firmware/ |
| H A D | Kconfig | 150 and manages secure monitor call to communicate with secure monitor
151 software at secure monitor exception level.
231 bool "Trusted Foundations secure monitor support"
235 the market) are booted with the Trusted Foundations secure monitor
236 active, requiring some core operations to be performed by the secure
239 This option allows the kernel to invoke the secure monitor whenever
247 tristate "Turris Mox rWTM secure firmware driver"
254 This driver communicates with the firmware on the Cortex-M3 secure
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| /linux/Documentation/virt/kvm/s390/ |
| H A D | s390-pv.rst | 20 The Ultravisor will secure and decrypt the guest's boot memory
70 The control structures associated with SIE provide the Secure
72 Secure Interception General Register Save Area. Guest GRs and most of
75 GRs are put into / retrieved from the Secure Interception General
88 The Secure Instruction Data Area contains instruction storage
99 There are two types of SIE secure instruction intercepts: the normal
100 and the notification type. Normal secure instruction intercepts will
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| /linux/Documentation/devicetree/bindings/power/ |
| H A D | amlogic,meson-sec-pwrc.yaml | 9 title: Amlogic Meson Secure Power Domains
15 Secure Power Domains used in Meson A1/C1/S4 & C3/T7 SoCs, and should be the child node
16 of secure-monitor.
39 secure-monitor {
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| /linux/arch/arm64/crypto/ |
| H A D | Kconfig | 45 SHA-1 secure hash algorithm (FIPS 180)
54 SHA-224 and SHA-256 secure hash algorithms (FIPS 180)
64 SHA-224 and SHA-256 secure hash algorithms (FIPS 180)
73 SHA-384 and SHA-512 secure hash algorithms (FIPS 180)
83 SHA-384 and SHA-512 secure hash algorithms (FIPS 180)
94 SHA-3 secure hash algorithms (FIPS 202)
105 SM3 (ShangMi 3) secure hash function (OSCCA GM/T 0004-2012)
116 SM3 (ShangMi 3) secure hash function (OSCCA GM/T 0004-2012)
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