| /linux/drivers/firmware/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 # see Documentation/kbuild/kconfig-language.rst.
7 menu "Firmware Drivers"
9 source "drivers/firmware/arm_scmi/Kconfig"
19 provides a mechanism for inter-processor communication between SCP
37 standard for registering callbacks from the platform firmware
62 bool "Add firmware-provided memory map to sysfs" if EXPERT
65 Add the firmware-provided (unmodified) memory map to /sys/firmware/memmap.
69 See also Documentation/ABI/testing/sysfs-firmware-memmap.
78 DMI-based module auto-loading.
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| /linux/Documentation/devicetree/bindings/arm/samsung/ |
| H A D | samsung-secure-firmware.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/samsung/samsung-secure-firmware.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos Secure Firmware
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - const: samsung,secure-firmware
19 Address of non-secure SYSRAM used for communication with firmware.
23 - compatible
24 - reg
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| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | secure.txt | 1 * ARM Secure world bindings
4 "Normal" and "Secure". Most devicetree consumers (including the Linux
6 world or the Secure world. However some devicetree consumers are
8 visible only in the Secure address space, only in the Normal address
10 virtual machine which boots Secure firmware and wants to tell the
11 firmware about the layout of the machine via devicetree.)
13 The general principle of the naming scheme for Secure world bindings
14 is that any property that needs a different value in the Secure world
15 can be supported by prefixing the property name with "secure-". So for
16 instance "secure-foo" would override "foo". For property names with
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| /linux/Documentation/devicetree/bindings/arm/amlogic/ |
| H A D | amlogic,meson-gx-ao-secure.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Amlogic Meson Firmware registers Interface
11 - Neil Armstrong <neil.armstrong@linaro.org>
15 secure firmware.
22 const: amlogic,meson-gx-ao-secure
24 - compatible
29 - items:
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-secvar | 1 What: /sys/firmware/secvar
4 Description: This directory is created if the POWER firmware supports OS
5 secureboot, thereby secure variables. It exposes interface
6 for reading/writing the secure variables
8 What: /sys/firmware/secvar/vars
11 Description: This directory lists all the secure variables that are supported
12 by the firmware.
14 What: /sys/firmware/secvar/format
17 Description: A string indicating which backend is in use by the firmware.
21 On powernv/OPAL, this value is provided by the OPAL firmware
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| /linux/include/linux/firmware/intel/ |
| H A D | stratix10-smc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2017-2018, Intel Corporation
9 #include <linux/arm-smccc.h>
13 * This file defines the Secure Monitor Call (SMC) message protocol used for
14 * service layer driver in normal world (EL1) to communicate with secure
15 * monitor software in Secure Monitor Exception Level 3 (EL3).
17 * This file is shared with secure firmware (FW) which is out of kernel tree.
19 * An ARM SMC instruction takes a function identifier and up to 6 64-bit
20 * register values as arguments, and can return up to 4 64-bit register
21 * value. The operation of the secure monitor is determined by the parameter
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| H A D | stratix10-svc-client.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2017-2018, Intel Corporation
23 * Secure firmware accepts the request issued by one of service clients.
26 * Service client successfully submits data buffer to secure firmware.
29 * Secure firmware completes data process, ready to accept the
33 * Secure firmware completes service request successfully. In case of
43 * Secure firmware doesn't support requested features such as RSU retry
77 * enum stratix10_svc_command_code - supported service commands
79 * @COMMAND_NOOP: do 'dummy' request for integration/debug/trouble-shooting
84 * @COMMAND_RECONFIG_DATA_SUBMIT: submit buffer(s) of bit-stream data for the
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| /linux/arch/arm/mach-exynos/ |
| H A D | firmware.c | 1 // SPDX-License-Identifier: GPL-2.0
15 #include <asm/firmware.h>
16 #include <asm/hardware/cache-l2x0.h>
62 * because Exynos3250 removes WFE in secure mode. in exynos_cpu_boot()
64 * On Exynos5 devices the call is ignored by trustzone firmware. in exynos_cpu_boot()
73 * isn't used for informing secure firmware about CPU id. in exynos_cpu_boot()
87 return -ENODEV; in exynos_set_cpu_boot_addr()
92 * Almost all Exynos-series of SoCs that run in secure mode don't need in exynos_set_cpu_boot_addr()
108 return -ENODEV; in exynos_get_cpu_boot_addr()
167 * Before the cache can be enabled, due to firmware in exynos_l2_write_sec()
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| /linux/Documentation/driver-api/firmware/ |
| H A D | other_interfaces.rst | 1 Other Firmware Interfaces
5 --------------
7 .. kernel-doc:: drivers/firmware/dmi_scan.c
11 --------------
13 .. kernel-doc:: drivers/firmware/edd.c
17 -------------------------------------
19 .. kernel-doc:: drivers/firmware/sysfb.c
23 ---------------------------------
25 higher than the kernel is granted. Such secure features include
31 drivers to request access to the secure features. The requests are queued
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| /linux/Documentation/tee/ |
| H A D | op-tee.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 OP-TEE (Open Portable Trusted Execution Environment)
7 The OP-TEE driver handles OP-TEE [1] based TEEs. Currently it is only the ARM
8 TrustZone based OP-TEE solution that is supported.
10 Lowest level of communication with OP-TEE builds on ARM SMC Calling
11 Convention (SMCCC) [2], which is the foundation for OP-TEE's SMC interface
12 [3] used internally by the driver. Stacked on top of that is OP-TEE Message
15 OP-TEE SMC interface provides the basic functions required by SMCCC and some
16 additional functions specific for OP-TEE. The most interesting functions are:
18 - OPTEE_SMC_FUNCID_CALLS_UID (part of SMCCC) returns the version information
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| /linux/drivers/firmware/meson/ |
| H A D | meson_sm.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Amlogic Secure Monitor driver
9 #define pr_fmt(fmt) "meson-sm: " fmt
11 #include <linux/arm-smccc.h>
24 #include <linux/firmware/meson/meson_sm.h>
63 const struct meson_sm_cmd *cmd = chip->cmd; in meson_sm_get_cmd()
65 while (cmd->smc_id && cmd->index != cmd_index) in meson_sm_get_cmd()
68 return cmd->smc_id; in meson_sm_get_cmd()
92 * meson_sm_call - generic SMC32 call to the secure-monitor
94 * @fw: Pointer to secure-monitor firmware
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| /linux/Documentation/admin-guide/ |
| H A D | thunderbolt.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 connection manager can be implemented either in firmware or software.
11 Typically PCs come with a firmware connection manager for Thunderbolt 3
25 -----------------------------------
27 should be a userspace tool that handles all the low-level details, keeps
31 found in ``Documentation/ABI/testing/sysfs-bus-thunderbolt``.
35 ``/etc/udev/rules.d/99-local.rules``::
56 All devices are automatically connected by the firmware. No user
66 secure
68 addition to UUID the device (if it supports secure connect) is sent
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| /linux/Documentation/devicetree/bindings/firmware/ |
| H A D | intel,stratix10-svc.txt | 3 Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
4 processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
10 communication with SDM, only the secure world of software (EL3, Exception
18 driver also manages secure monitor call (SMC) to communicate with secure monitor
22 -------------------
24 the firmware node.
26 - compatible: "intel,stratix10-svc" or "intel,agilex-svc"
27 - method: smc or hvc
28 smc - Secure Monitor Call
29 hvc - Hypervisor Call
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| H A D | amlogic,meson-gxbb-sm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/amlogic,meson-gxbb-sm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Secure Monitor (SM)
10 In the Amlogic SoCs the Secure Monitor code is used to provide access to the
14 - Neil Armstrong <neil.armstrong@linaro.org>
19 - const: amlogic,meson-gxbb-sm
20 - items:
21 - const: amlogic,meson-gx-sm
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| H A D | brcm,kona-smc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/firmware/brcm,kona-smc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom Kona family Secure Monitor bounce buffer
10 A bounce buffer used for non-secure to secure communications.
13 - Florian Fainelli <f.fainelli@gmail.com>
18 - enum:
19 - brcm,bcm11351-smc
20 - brcm,bcm21664-smc
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| /linux/Documentation/arch/arm/ |
| H A D | firmware.rst | 2 Interface for registering and calling firmware-specific operations for ARM
7 Some boards are running with secure firmware running in TrustZone secure
9 a need to provide an interface for such platforms to specify available firmware
12 Firmware operations can be specified by filling in a struct firmware_ops
18 The ops pointer must be non-NULL. More information about struct firmware_ops
19 and its members can be found in arch/arm/include/asm/firmware.h header.
22 set anything if platform does not require firmware operations.
24 To call a firmware operation, a helper macro is provided::
27 ((firmware_ops->op) ? firmware_ops->op(__VA_ARGS__) : (-ENOSYS))
30 -ENOSYS to signal that given operation is not available (for example, to allow
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| /linux/drivers/net/wireless/silabs/wfx/ |
| H A D | hif_rx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Handling of the chip-to-host events (aka indications) of the hardware API.
5 * Copyright (c) 2017-2020, Silicon Laboratories, Inc.
6 * Copyright (c) 2010, ST-Ericsson
24 int cmd = hif->id; in wfx_hif_generic_confirm()
25 int len = le16_to_cpu(hif->len) - 4; /* drop header */ in wfx_hif_generic_confirm()
27 WARN(!mutex_is_locked(&wdev->hif_cmd.lock), "data locking error"); in wfx_hif_generic_confirm()
29 if (!wdev->hif_cmd.buf_send) { in wfx_hif_generic_confirm()
30 dev_warn(wdev->dev, "unexpected confirmation: 0x%.2x\n", cmd); in wfx_hif_generic_confirm()
31 return -EINVAL; in wfx_hif_generic_confirm()
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| /linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | arm,mhu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jassi Brar <jaswinder.singh@linaro.org>
13 The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3
19 be a 'Secure' resource, hence can't be used by Linux running NS.
22 interrupt signal using a 32-bit register, with all 32-bits logically ORed
28 interrupt. Each of the 32-bits can be used as "doorbell" to alert the remote
37 - arm,mhu
38 - arm,mhu-doorbell
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| /linux/drivers/mfd/ |
| H A D | intel-m10-bmc-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Intel MAX 10 Board Management Controller chip - common code
5 * Copyright (C) 2018-2020 Intel Corporation. All rights reserved.
12 #include <linux/mfd/intel-m10-bmc.h>
18 if (!m10bmc->info->handshake_sys_reg_nranges) in m10bmc_fw_state_set()
21 down_write(&m10bmc->bmcfw_lock); in m10bmc_fw_state_set()
22 m10bmc->bmcfw_state = new_state; in m10bmc_fw_state_set()
23 up_write(&m10bmc->bmcfw_lock); in m10bmc_fw_state_set()
28 * For some Intel FPGA devices, the BMC firmware is not available to service
29 * handshake registers during a secure update.
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| /linux/Documentation/networking/devlink/ |
| H A D | iosm.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 The ``iosm`` driver implements the following driver-specific parameters.
15 .. list-table:: Driver-specific parameters implemented
18 * - Name
19 - Type
20 - Mode
21 - Description
22 * - ``erase_full_flash``
23 - u8
24 - runtime
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| /linux/security/integrity/platform_certs/ |
| H A D | load_powerpc.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * - loads keys and hashes stored and controlled by the firmware.
19 do { db = data + offset; size = size - offset; } while (0)
22 * Get a certificate list blob from the named secure variable.
25 * - a pointer to a kmalloc'd buffer containing the cert list on success
26 * - NULL if the key does not exist
27 * - an ERR_PTR on error
34 rc = secvar_ops->get(key, keylen, NULL, size); in get_cert_list()
36 if (rc == -ENOENT) in get_cert_list()
43 return ERR_PTR(-ENOMEM); in get_cert_list()
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| /linux/drivers/firmware/qcom/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 # see Documentation/kbuild/kconfig-language.rst.
7 menu "Qualcomm firmware drivers"
29 Use the generic allocator mode. The memory is page-aligned, non-cachable
49 Various Qualcomm SoCs have a Secure Execution Environment (SEE) running
62 bool "Qualcomm SEE UEFI Secure App client driver"
67 Instead, these need to be accessed via the UEFI Secure Application
68 (uefisecapp), residing in the Secure Execution Environment (SEE).
72 provide user-space with access to EFI variables via efivarfs.
|
| /linux/drivers/mmc/host/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
68 tristate "Secure Digital Host Controller Interface support"
71 This selects the generic Secure Digital Host Controller Interface.
94 implements a hardware byte swapper using a 32-bit datum.
106 support UHS2-capable devices.
118 This selects the PCI Secure Digital Host Controller Interface.
133 disabled, it will steal the MMC cards away - rendering them
156 This selects the common helper functions support for Secure Digital
170 This selects the Arasan Secure Digital Host Controller Interface
184 This selects the ASPEED Secure Digital Host Controller Interface.
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| /linux/tools/testing/selftests/kexec/ |
| H A D | kexec_common_lib.sh | 2 # SPDX-License-Identifier: GPL-2.0
6 VERBOSE="${VERBOSE:-1}"
7 IKCONFIG="/tmp/config-`uname -r`"
8 KERNEL_IMAGE="/boot/vmlinuz-`uname -r`"
13 [ $VERBOSE -ne 0 ] && echo "[INFO] $1"
19 [ $VERBOSE -ne 0 ] && echo "$1 [PASS]"
26 [ $VERBOSE -ne 0 ] && echo "$1 [FAIL]"
33 [ $VERBOSE -ne 0 ] && echo "$1"
37 # Check efivar SecureBoot-$(the UUID) and SetupMode-$(the UUID).
38 # (Based on kdump-lib.sh)
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| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | arm,arch_timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
13 ARM cores may have a per-core architected timer, which provides per-cpu timers,
17 The per-core architected timer is attached to a GIC to deliver its
18 per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
24 - items:
25 - const: arm,cortex-a15-timer
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