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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dsdhci-msm.yaml4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
13 Secure Digital Host Controller Interface (SDHCI) present on
20 - qcom,sdhci-msm-v4
24 - qcom,apq8084-sdhci
25 - qcom,ipq4019-sdhci
26 - qcom,ipq8074-sdhci
27 - qcom,msm8226-sdhci
28 - qcom,msm8953-sdhci
[all...]
H A Dsdhci-msm.txt1 * Qualcomm SDHCI controller (sdhci-msm)
4 and the properties used by the sdhci-msm driver.
9 "qcom,sdhci-msm-v4" for sdcc versions less than 5.0
10 "qcom,sdhci-msm-v5" for sdcc version 5.0
13 string is added to support this change - "qcom,sdhci-msm-v5".
15 "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"
16 "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"
17 "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"
18 "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"
19 "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"
[all …]
H A Darasan,sdhci.txt1 Device Tree Bindings for the Arasan SDHCI Controller
13 - "arasan,sdhci-8.9a": generic Arasan SDHCI 8.9a PHY
14 - "arasan,sdhci-4.9a": generic Arasan SDHCI 4.9a PHY
15 - "arasan,sdhci-5.1": generic Arasan SDHCI 5.1 PHY
16 - "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY
18 - "xlnx,zynqmp-8.9a": ZynqMP SDHCI 8.9a PHY
21 - "xlnx,versal-8.9a": Versal SDHCI 8.9a PHY
24 - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY
26 - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY
28 - "intel,lgm-sdhci-5.1-sdxc", "arasan,sdhci-5.1": Intel LGM SDXC PHY
[all …]
H A Dbrcm,sdhci-iproc.txt1 Broadcom IPROC SDHCI controller
4 by mmc.txt and the properties that represent the IPROC SDHCI controller.
8 "brcm,bcm2835-sdhci"
10 "brcm,sdhci-iproc-cygnus"
11 "brcm,sdhci-iproc"
13 Use brcm2835-sdhci for the eMMC controller on the BCM2835 (Raspberry Pi) and
16 Use sdhci-iproc-cygnus for Broadcom SDHCI Controllers
17 restricted to 32bit host accesses to SDHCI registers.
19 Use sdhci-iproc for Broadcom SDHCI Controllers that allow standard
20 8, 16, 32-bit host access to SDHCI register.
[all …]
H A Dbrcm,sdhci-brcmstb.yaml4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#
7 title: Broadcom BRCMSTB/BMIPS SDHCI Controller
18 - brcm,bcm7216-sdhci
19 - const: brcm,bcm7445-sdhci
20 - const: brcm,sdhci-brcmstb
23 - brcm,bcm74165b0-sdhci
24 - brcm,bcm7445-sdhci
25 - brcm,bcm7425-sdhci
26 - const: brcm,sdhci-brcmstb
42 - description: handle to core clock for the sdhci controlle
[all...]
H A Darasan,sdhci.yaml4 $id: http://devicetree.org/schemas/mmc/arasan,sdhci.yaml#
7 title: Arasan SDHCI Controller
18 const: arasan,sdhci-5.1
45 - const: arasan,sdhci-8.9a # generic Arasan SDHCI 8.9a PHY
46 - const: arasan,sdhci-4.9a # generic Arasan SDHCI 4.9a PHY
47 - const: arasan,sdhci-5.1 # generic Arasan SDHCI 5.1 PHY
49 - const: rockchip,rk3399-sdhci
[all...]
H A Dbrcm,sdhci-brcmstb.txt1 * BROADCOM BRCMSTB/BMIPS SDHCI Controller
4 and the properties used by the sdhci-brcmstb driver.
12 - "brcm,bcm7425-sdhci"
13 - "brcm,bcm7445-sdhci"
14 - "brcm,bcm7216-sdhci"
20 sdhci@84b0000 {
24 sdhci,auto-cmd12;
25 compatible = "brcm,bcm7216-sdhci",
26 "brcm,bcm7445-sdhci",
27 "brcm,sdhci-brcmstb";
[all …]
H A Dnvidia,tegra20-sdhci.txt7 by mmc.txt and the properties used by the sdhci-tegra driver.
11 - "nvidia,tegra20-sdhci": for Tegra20
12 - "nvidia,tegra30-sdhci": for Tegra30
13 - "nvidia,tegra114-sdhci": for Tegra114
14 - "nvidia,tegra124-sdhci": for Tegra124 and Tegra132
15 - "nvidia,tegra210-sdhci": for Tegra210
16 - "nvidia,tegra186-sdhci": for Tegra186
17 - "nvidia,tegra194-sdhci": for Tegra194
23 strings 'sdhci' and 'tmclk' to represent the module and
25 For all other Tegra devices must contain the string 'sdhci'
[all …]
H A Dnvidia,tegra20-sdhci.yaml4 $id: http://devicetree.org/schemas/mmc/nvidia,tegra20-sdhci.yaml#
18 mmc-controller.yaml and the properties for the Tegra SDHCI controller.
24 - nvidia,tegra20-sdhci
25 - nvidia,tegra30-sdhci
26 - nvidia,tegra114-sdhci
27 - nvidia,tegra124-sdhci
28 - nvidia,tegra210-sdhci
29 - nvidia,tegra186-sdhci
30 - nvidia,tegra194-sdhci
33 - const: nvidia,tegra132-sdhci
[all …]
H A Dmarvell,xenon-sdhci.yaml4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
7 title: Marvell Xenon SDHCI Controller
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
31 - marvell,armada-ap807-sdhci
32 - marvell,ac5-sdhci
33 - const: marvell,armada-ap806-sdhci
36 - const: marvell,armada-3700-sdhci
37 - const: marvell,sdhci-xenon
43 For "marvell,armada-3700-sdhci", tw
[all...]
H A Daspeed,sdhci.yaml5 $id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml#
42 "^sdhci@[0-9a-f]+$":
50 - aspeed,ast2400-sdhci
51 - aspeed,ast2500-sdhci
52 - aspeed,ast2600-sdhci
55 description: The SDHCI registers
62 sdhci,auto-cmd12:
92 sdhci0: sdhci@100 {
93 compatible = "aspeed,ast2500-sdhci";
96 sdhci,auto-cmd12;
[all …]
H A Dmarvell,xenon-sdhci.txt1 Marvell Xenon SDHCI Controller device tree bindings
12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.
14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.
15 - "marvell,armada-ap807-sdhci": For controllers on Armada AP807.
16 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.
29 * For "marvell,armada-3700-sdhci", two register areas.
32 Please follow the examples with compatible "marvell,armada-3700-sdhci"
97 Only valid when "marvell,armada-3700-sdhci" is selected.
102 Please follow the examples with compatible "marvell,armada-3700-sdhci"
108 sdhci@aa0000 {
[all …]
H A Dsdhci-am654.txt1 Device Tree Bindings for the SDHCI Controllers present on TI's AM654 SOCs
12 "ti,am654-sdhci-5.1": SDHCI on AM654 device.
13 "ti,j721e-sdhci-8bit": 8 bit SDHCI on J721E device.
14 "ti,j721e-sdhci-4bit": 4 bit SDHCI on J721E device.
16 - The first should be the sdhci register space
36 Optional Properties (Required for ti,am654-sdhci-5.1 and ti,j721e-sdhci-8bit):
46 sdhci0: sdhci@4f80000 {
47 compatible = "ti,am654-sdhci-5.1";
53 sdhci-caps-mask = <0x80000007 0x0>;
H A Dbrcm,iproc-sdhci.yaml4 $id: http://devicetree.org/schemas/mmc/brcm,iproc-sdhci.yaml#
7 title: Broadcom IPROC SDHCI controller
20 - brcm,bcm2835-sdhci
22 - brcm,sdhci-iproc-cygnus
23 - brcm,sdhci-iproc
24 - brcm,bcm7211a0-sdhci
35 Handle to core clock for the sdhci controller.
37 sdhci,auto-cmd12:
56 compatible = "brcm,sdhci-iproc-cygnus";
61 sdhci,auto-cmd12;
H A Dsamsung-sdhci.txt1 * Samsung's SDHCI Controller device tree bindings
3 Samsung's SDHCI controller is used as a connectivity interface with external
6 Samsung implementation of the SDHCI controller.
10 - "samsung,s3c6410-sdhci": For controllers compatible with s3c6410 sdhci
12 - "samsung,exynos4210-sdhci": For controllers compatible with Exynos4 sdhci
20 sdhci@12530000 {
21 compatible = "samsung,exynos4210-sdhci";
H A Dsdhci-omap.txt1 * TI OMAP SDHCI Controller
8 - compatible: Should be "ti,omap2430-sdhci" for omap2430 controllers
9 Should be "ti,omap3-sdhci" for omap3 controllers
10 Should be "ti,omap4-sdhci" for omap4 and ti81 controllers
11 Should be "ti,omap5-sdhci" for omap5 controllers
12 Should be "ti,dra7-sdhci" for DRA7 and DRA72 controllers
13 Should be "ti,k2g-sdhci" for K2G
14 Should be "ti,am335-sdhci" for am335x controllers
15 Should be "ti,am437-sdhci" for am437x controllers
36 compatible = "ti,dra7-sdhci";
H A Dsdhci-st.txt1 * STMicroelectronics sdhci-st MMC/SD controller
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
64 mmc0: sdhci@fe81e000 {
65 compatible = "st,sdhci";
77 mmc1: sdhci@9080000 {
78 compatible = "st,sdhci-stih407", "st,sdhci";
93 mmc0: sdhci@9060000 {
94 compatible = "st,sdhci-stih407", "st,sdhci";
H A Dsdhci.txt7 - sdhci-caps-mask: The sdhci capabilities register is incorrect. This 64bit
8 property corresponds to the bits in the sdhci capability register. If the bit
10 turned off, before applying sdhci-caps.
11 - sdhci-caps: The sdhci capabilities register is incorrect. This 64bit
12 property corresponds to the bits in the sdhci capability register. If the
H A Dsdhci-common.yaml4 $id: http://devicetree.org/schemas/mmc/sdhci-common.yaml#
7 title: SDHCI Controller Common Properties
13 Common properties present on Secure Digital Host Controller Interface (SDHCI)
17 sdhci-caps:
20 Additionally present SDHCI capabilities - values for SDHCI_CAPABILITIES
23 sdhci-caps-mask:
26 Masked SDHCI capabilities to remove from SDHCI_CAPABILITIES and
H A Dsdhci-atmel.txt1 * Atmel SDHCI controller
5 sdhci-of-at91 driver.
8 - compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci"
9 or "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci".
12 "atmel,sama5d2-sdhci".
13 Must be "hclock", "multclk" for "microchip,sam9x60-sdhci".
14 Must be "hclock", "multclk" for "microchip,sam9x7-sdhci".
28 compatible = "atmel,sama5d2-sdhci";
[all...]
H A Dsdhci-am654.yaml5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
14 - $ref: sdhci-common.yaml#
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
22 - ti,am64-sdhci-8bit
23 - ti,am654-sdhci-5.1
24 - ti,j721e-sdhci-4bit
25 - ti,j721e-sdhci-8bit
27 - const: ti,j7200-sdhci-8bit
28 - const: ti,j721e-sdhci-8bit
[all …]
H A Dmicrochip,sdhci-pic32.txt1 * Microchip PIC32 SDHCI Controller
4 and the properties used by the sdhci-pic32 driver.
7 - compatible: Should be "microchip,pic32mzda-sdhci"
14 - pinctrl-0: Phandle referencing pin configuration of the SDHCI controller.
19 sdhci@1f8ec000 {
20 compatible = "microchip,pic32mzda-sdhci";
H A Dfujitsu,sdhci-fujitsu.yaml4 $id: http://devicetree.org/schemas/mmc/fujitsu,sdhci-fujitsu.yaml#
7 title: Fujitsu/Socionext SDHCI controller (F_SDH30)
19 - const: socionext,synquacer-sdhci
20 - const: fujitsu,mb86s70-sdhci-3.0
22 - fujitsu,mb86s70-sdhci-3.0
60 compatible = "fujitsu,mb86s70-sdhci-3.0";
H A Dsdhci-dove.txt1 * Marvell sdhci-dove controller
4 and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers.
6 - compatible: Should be "marvell,dove-sdhci".
11 compatible = "marvell,dove-sdhci";
H A Dsdhci-spear.txt1 * SPEAr SDHCI Controller
4 and the properties used by the sdhci-spear driver.
7 - compatible: "st,spear300-sdhci"
14 sdhci@fc000000 {
15 compatible = "st,spear300-sdhci";

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