1c66ec88fSEmmanuel Vadot* Atmel SDHCI controller 2c66ec88fSEmmanuel Vadot 3c66ec88fSEmmanuel VadotThis file documents the differences between the core properties in 4c66ec88fSEmmanuel VadotDocumentation/devicetree/bindings/mmc/mmc.txt and the properties used by the 5c66ec88fSEmmanuel Vadotsdhci-of-at91 driver. 6c66ec88fSEmmanuel Vadot 7c66ec88fSEmmanuel VadotRequired properties: 8*aa1a8ff2SEmmanuel Vadot- compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci" 9*aa1a8ff2SEmmanuel Vadot or "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci". 10c66ec88fSEmmanuel Vadot- clocks: Phandlers to the clocks. 11c66ec88fSEmmanuel Vadot- clock-names: Must be "hclock", "multclk", "baseclk" for 12c66ec88fSEmmanuel Vadot "atmel,sama5d2-sdhci". 13c66ec88fSEmmanuel Vadot Must be "hclock", "multclk" for "microchip,sam9x60-sdhci". 14*aa1a8ff2SEmmanuel Vadot Must be "hclock", "multclk" for "microchip,sam9x7-sdhci". 15c66ec88fSEmmanuel Vadot 16c66ec88fSEmmanuel VadotOptional properties: 17c66ec88fSEmmanuel Vadot- assigned-clocks: The same with "multclk". 18c66ec88fSEmmanuel Vadot- assigned-clock-rates The rate of "multclk" in order to not rely on the 19c66ec88fSEmmanuel Vadot gck configuration set by previous components. 20c66ec88fSEmmanuel Vadot- microchip,sdcal-inverted: when present, polarity on the SDCAL SoC pin is 21c66ec88fSEmmanuel Vadot inverted. The default polarity for this signal is described in the datasheet. 22c66ec88fSEmmanuel Vadot For instance on SAMA5D2, the pin is usually tied to the GND with a resistor 23c66ec88fSEmmanuel Vadot and a capacitor (see "SDMMC I/O Calibration" chapter). 24c66ec88fSEmmanuel Vadot 25c66ec88fSEmmanuel VadotExample: 26c66ec88fSEmmanuel Vadot 27c66ec88fSEmmanuel Vadotmmc0: sdio-host@a0000000 { 28c66ec88fSEmmanuel Vadot compatible = "atmel,sama5d2-sdhci"; 29c66ec88fSEmmanuel Vadot reg = <0xa0000000 0x300>; 30c66ec88fSEmmanuel Vadot interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; 31c66ec88fSEmmanuel Vadot clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>; 32c66ec88fSEmmanuel Vadot clock-names = "hclock", "multclk", "baseclk"; 33c66ec88fSEmmanuel Vadot assigned-clocks = <&sdmmc0_gclk>; 34c66ec88fSEmmanuel Vadot assigned-clock-rates = <480000000>; 35c66ec88fSEmmanuel Vadot}; 36