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/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-common.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SDHCI Controller Common Properties
10 - Adrian Hunter <adrian.hunter@intel.com>
13 Common properties present on Secure Digital Host Controller Interface (SDHCI)
17 sdhci-caps:
20 Additionally present SDHCI capabilities - values for SDHCI_CAPABILITIES
23 sdhci-caps-mask:
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H A Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
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/linux/drivers/mmc/host/
H A Dsdhci-npcm.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include "sdhci-pltfm.h"
34 struct device *dev = &pdev->dev; in npcm_sdhci_probe()
36 u32 caps; in npcm_sdhci_probe() local
41 return -EINVAL; in npcm_sdhci_probe()
49 pltfm_host->clk = devm_clk_get_optional_enabled(dev, NULL); in npcm_sdhci_probe()
50 if (IS_ERR(pltfm_host->clk)) { in npcm_sdhci_probe()
51 return PTR_ERR(pltfm_host->clk); in npcm_sdhci_probe()
54 caps = sdhci_readl(host, SDHCI_CAPABILITIES); in npcm_sdhci_probe()
55 if (caps & SDHCI_CAN_DO_8BIT) in npcm_sdhci_probe()
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H A Dsdhci-iproc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * iProc SDHCI platform driver
14 #include "sdhci-pltfm.h"
18 u32 caps; member
36 u32 val = readl(host->ioaddr + reg); in sdhci_iproc_readl()
39 mmc_hostname(host->mmc), reg, val); in sdhci_iproc_readl()
50 if ((reg == SDHCI_TRANSFER_MODE) && iproc_host->is_cmd_shadowed) { in sdhci_iproc_readw()
52 val = iproc_host->shadow_cmd; in sdhci_iproc_readw()
54 iproc_host->is_blk_shadowed) { in sdhci_iproc_readw()
56 val = iproc_host->shadow_blk; in sdhci_iproc_readw()
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H A Dsdhci-pic32.c2 * Support of SDHCI platform devices for Microchip PIC32.
7 * Inspired by sdhci-pltfm.c
26 #include "sdhci.h"
27 #include "sdhci-pltfm.h"
28 #include <linux/platform_data/sdhci-pic32.h>
55 return clk_get_rate(sdhci_pdata->base_clk); in pic32_sdhci_get_max_clock()
65 if (host->version >= SDHCI_SPEC_300) in pic32_sdhci_set_bus_width()
68 if (host->version >= SDHCI_SPEC_300) in pic32_sdhci_set_bus_width()
109 u32 bus = readl(host->ioaddr + SDH_SHARED_BUS_CTRL); in pic32_sdhci_shared_bus()
121 writel(bus, host->ioaddr + SDH_SHARED_BUS_CTRL); in pic32_sdhci_shared_bus()
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H A Dsdhci-pxav2.c1 // SPDX-License-Identifier: GPL-2.0-only
26 #include "sdhci.h"
27 #include "sdhci-pltfm.h"
55 struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); in pxav2_reset()
56 struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; in pxav2_reset()
67 if (pdata && pdata->clk_delay_sel == 1) { in pxav2_reset()
68 tmp = readw(host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP); in pxav2_reset()
71 tmp |= (pdata->clk_delay_cycles & SDCLK_DELAY_MASK) in pxav2_reset()
76 writew(tmp, host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP); in pxav2_reset()
79 if (pdata && (pdata->flags & PXA_FLAG_ENABLE_CLOCK_GATING)) { in pxav2_reset()
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H A Dsdhci-bcm-kona.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/mmc/slot-gpio.h>
16 #include "sdhci-pltfm.h"
17 #include "sdhci.h"
63 return -EFAULT; in sdhci_bcm_kona_sd_reset()
72 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS) in sdhci_bcm_kona_sd_reset()
73 * Back-to-Back writes to same register needs delay when SD bus clock in sdhci_bcm_kona_sd_reset()
74 * is very low w.r.t AHB clock, mainly during boot-time and during card in sdhci_bcm_kona_sd_reset()
75 * insert-removal. in sdhci_bcm_kona_sd_reset()
97 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS) in sdhci_bcm_kona_sd_init()
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H A Dsdhci-esdhc-mcf.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/platform_data/mmc-esdhc-mcf.h>
13 #include "sdhci-pltfm.h"
14 #include "sdhci-esdhc.h"
49 void __iomem *base = host->ioaddr + (reg & ~3); in esdhc_clrset_be()
62 * Note: mcf is big-endian, single bytes need to be accessed at big endian
67 void __iomem *base = host->ioaddr + (reg & ~3); in esdhc_mcf_writeb_be()
74 u8 tmp = readb(host->ioaddr + SDHCI_HOST_CONTROL + 1); in esdhc_mcf_writeb_be()
85 writel(host_ctrl, host->ioaddr + SDHCI_HOST_CONTROL); in esdhc_mcf_writeb_be()
97 void __iomem *base = host->ioaddr + (reg & ~3); in esdhc_mcf_writew_be()
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H A Dsdhci-of-k1.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2023-2025 SpacemiT (Hangzhou) Technology Co. Ltd
20 #include "sdhci.h"
21 #include "sdhci-pltfm.h"
101 if (!(host->mmc->caps2 & MMC_CAP2_NO_MMC)) in spacemit_sdhci_reset()
115 if (!(host->mmc->caps2 & MMC_CAP2_NO_SDIO)) in spacemit_sdhci_set_uhs_signaling()
121 struct mmc_host *mmc = host->mmc; in spacemit_sdhci_set_clock()
123 if (mmc->ios.timing <= MMC_TIMING_UHS_SDR50) in spacemit_sdhci_set_clock()
150 ret = readl_poll_timeout(host->ioaddr + SPACEMIT_SDHC_PHY_DLLSTS, state, in spacemit_sdhci_phy_dll_init()
152 if (ret == -ETIMEDOUT) in spacemit_sdhci_phy_dll_init()
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H A Dsdhci_f_sdh30.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
20 #include "sdhci-pltfm.h"
55 if (priv->vendor_hs200) { in sdhci_f_sdh30_soft_voltage_switch()
56 dev_info(priv->dev, "%s: setting hs200\n", __func__); in sdhci_f_sdh30_soft_voltage_switch()
58 ctrl |= priv->vendor_hs200; in sdhci_f_sdh30_soft_voltage_switch()
82 if (priv->enable_cmd_dat_delay) { in sdhci_f_sdh30_reset()
88 if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) && in sdhci_f_sdh30_reset()
116 struct device *dev = &pdev->dev; in sdhci_f_sdh30_probe()
129 priv->dev = dev; in sdhci_f_sdh30_probe()
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H A Dsdhci-pci-arasan.c1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci-pci-arasan.c - Driver for Arasan PCI Controller with
14 #include "sdhci.h"
15 #include "sdhci-pci.h"
105 return -EBUSY; in arasan_phy_addr_poll()
140 return -EBUSY; in arasan_phy_sts_poll()
144 return -EBUSY; in arasan_phy_sts_poll()
159 return -EBUSY; in arasan_phy_init()
162 return -EBUSY; in arasan_phy_init()
184 return -EBUSY; in arasan_phy_init()
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H A Dsdhci-pci-o2micro.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include "sdhci.h"
18 #include "sdhci-pci.h"
101 mmc_hostname(host->mmc)); in sdhci_o2_wait_card_detect_stable()
137 mmc_hostname(host->mmc)); in sdhci_o2_enable_internal_clock()
171 pci_read_config_dword(chip->pdev, in o2_pci_set_baseclk()
177 pci_write_config_dword(chip->pdev, in o2_pci_set_baseclk()
221 host->tuning_done = true; in __sdhci_o2_execute_tuning()
225 mmc_hostname(host->mmc)); in __sdhci_o2_execute_tuning()
233 mmc_hostname(host->mmc)); in __sdhci_o2_execute_tuning()
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H A Dbcm2835.c1 // SPDX-License-Identifier: GPL-2.0
5 * The 2835 has two SD controllers: The Arasan sdhci controller
9 * The sdhci controller supports both sdcard and sdio. The sdhost
12 * the sdhost controller allows to use the sdhci controller for wifi
21 * Copyright (C) 2015-2016 Raspberry Pi (Trading) Ltd.
24 * mmc-bcm2835.c by Gellert Weisz
26 * sdhci-bcm2708.c by Broadcom
27 * sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko
28 * sdhci.c and sdhci-pci.c by Pierre Ossman
34 #include <linux/dma-mapping.h>
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H A Dsdhci-pci-gli.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Version: v0.9.0 (2019-08-08)
17 #include "sdhci.h"
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pci.h"
21 #include "sdhci-uhs2.h"
468 if (!host->tuning_done) { in __sdhci_execute_tuning_9750()
481 if (!host->tuning_done) { in __sdhci_execute_tuning_9750()
483 mmc_hostname(host->mmc)); in __sdhci_execute_tuning_9750()
484 return -ETIMEDOUT; in __sdhci_execute_tuning_9750()
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H A Djz4740_mmc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
13 #include <linux/dma-mapping.h>
19 #include <linux/mmc/slot-gpio.h>
132 * is in-flight. This is used via the pre_req/post_req hooks.
134 * Following what other drivers do (sdhci, dw_mmc) we use the following cookie
192 if (host->version >= JZ_MMC_JZ4725B) in jz4740_mmc_write_irq_mask()
193 return writel(val, host->base + JZ_REG_MMC_IMASK); in jz4740_mmc_write_irq_mask()
195 return writew(val, host->base + JZ_REG_MMC_IMASK); in jz4740_mmc_write_irq_mask()
201 if (host->version >= JZ_MMC_JZ4780) in jz4740_mmc_write_irq_reg()
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/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-ast2600-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
34 compatible = "shared-dma-pool";
41 compatible = "shared-dma-pool";
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/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama7g5ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama7g5ek.dts - Device Tree file for SAMA7G5-EK board
11 /dts-v1/;
12 #include "sama7g5-pinfunc.h"
14 #include <dt-bindings/mfd/atmel-flexcom.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/pinctrl/at91.h>
17 #include <dt-bindings/sound/microchip,pdmc.h>
20 model = "Microchip SAMA7G5-EK";
25 stdout-path = "serial0:115200n8";
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H A Dat91-sama7g54_curiosity.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama7g54_curiosity.dts - Device Tree file for SAMA7G54 Curiosity Board
10 /dts-v1/;
11 #include "sama7g5-pinfunc.h"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/mfd/atmel-flexcom.h>
16 #include <dt-bindings/pinctrl/at91.h>
20 compatible = "microchip,sama7g54-curiosity", "microchip,sama7g5", "microchip,sama7";
28 stdout-path = "serial0:115200n8";
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H A Dat91-sama7d65_curiosity.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama7d65_curiosity.dts - Device Tree file for SAMA7D65 Curiosity board
10 /dts-v1/;
11 #include "sama7d65-pinfunc.h"
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/leds/common.h>
16 #include <dt-bindings/pinctrl/at91.h>
20 compatible = "microchip,sama7d65-curiosity", "microchip,sama7d65",
28 stdout-path = "serial0:115200n8";
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-nitrogen-r2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
13 reg_vref_1v8: regulator-vref-1v8 {
14 compatible = "regulator-fixed";
15 regulator-name = "vref-1v8";
16 regulator-min-microvolt = <1800000>;
17 regulator-max-microvolt = <1800000>;
20 reg_vref_3v3: regulator-vref-3v3 {
21 compatible = "regulator-fixed";
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/linux/arch/arm64/boot/dts/qcom/
H A Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,sdx75.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/mailbox/qcom-ipcc.h>
17 #include <dt-bindings/power/qcom,rpmhpd.h>
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/linux/arch/arm64/boot/dts/marvell/
H A Darmada-3720-turris-mox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/bus/moxtet.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include "armada-372x.dtsi"
16 compatible = "cznic,turris-mox", "marvell,armada3720",
28 stdout-path = "serial0:115200n8";
37 compatible = "gpio-leds";
41 linux,default-trigger = "default-on";
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2016-2022 Toradex
6 #include <dt-bindings/pwm/pwm.h>
15 brightness-levels = <0 45 63 88 119 158 203 255>;
16 compatible = "pwm-backlight";
17 default-brightness-level = <4>;
18 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_gpio_bl_on>;
21 power-supply = <&reg_module_3v3>;
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