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Searched +full:sdhci +full:- +full:caps (Results 1 – 20 of 20) sorted by relevance

/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci.txt7 - sdhci-caps-mask: The sdhci capabilities register is incorrect. This 64bit
8 property corresponds to the bits in the sdhci capability register. If the bit
10 turned off, before applying sdhci-caps.
11 - sdhci-caps: The sdhci capabilities register is incorrect. This 64bit
12 property corresponds to the bits in the sdhci capability register. If the
H A Dsdhci-common.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SDHCI Controller Common Properties
10 - Adrian Hunter <adrian.hunter@intel.com>
13 Common properties present on Secure Digital Host Controller Interface (SDHCI)
17 sdhci-caps:
20 Additionally present SDHCI capabilities - values for SDHCI_CAPABILITIES
23 sdhci-caps-mask:
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H A Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
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/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-ast2600-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
34 compatible = "shared-dma-pool";
41 compatible = "shared-dma-pool";
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H A Daspeed-bmc-facebook-wedge400.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include "ast2500-facebook-netbmc-common.dtsi"
10 compatible = "facebook,wedge400-bmc", "aspeed,ast2500";
14 * PCA9548 (2-0070) provides 8 channels connecting to
27 * PCA9548 (8-0070) provides 8 channels connecting to
40 * PCA9548 (11-0076) provides 8 channels connecting to
56 stdout-path = &uart1;
60 ast-adc-hwmon {
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/linux/drivers/mmc/host/
H A Dsdhci-pxav2.c1 // SPDX-License-Identifier: GPL-2.0-only
26 #include "sdhci.h"
27 #include "sdhci-pltfm.h"
55 struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); in pxav2_reset()
56 struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; in pxav2_reset()
67 if (pdata && pdata->clk_delay_sel == 1) { in pxav2_reset()
68 tmp = readw(host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP); in pxav2_reset()
71 tmp |= (pdata->clk_delay_cycles & SDCLK_DELAY_MASK) in pxav2_reset()
76 writew(tmp, host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP); in pxav2_reset()
79 if (pdata && (pdata->flags & PXA_FLAG_ENABLE_CLOCK_GATING)) { in pxav2_reset()
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H A Dsdhci_am654.c1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci_am654.c - SDHCI driver for TI's AM654 SOCs
5 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pltfm.h"
88 #define SDHCI_AM654_AUTOSUSPEND_DELAY -1
108 [MMC_TIMING_LEGACY] = {"ti,otap-del-sel-legacy",
109 "ti,itap-del-sel-legacy",
111 [MMC_TIMING_MMC_HS] = {"ti,otap-del-sel-mmc-hs",
112 "ti,itap-del-sel-mmc-hs",
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H A Dsdhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
20 #include <linux/mmc/slot-gpio.h>
32 #include "sdhci-cqhci.h"
33 #include "sdhci-pltfm.h"
192 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
194 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()
200 return readw(host->ioaddr + reg); in tegra_sdhci_readw()
213 pltfm_host->xfer_mode_shadow = val; in tegra_sdhci_writew()
216 writel((val << 16) | pltfm_host->xfer_mode_shadow, in tegra_sdhci_writew()
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H A Dsdhci-msm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/mmc/host/sdhci-msm.c - Qualcomm SDHCI Platform driver
5 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
23 #include "sdhci-cqhci.h"
24 #include "sdhci-pltfm.h"
123 #define INVALID_TUNING_PHASE -1
140 /* Max load for eMMC Vdd-io supply */
146 /* Max load for SD Vdd-io supply */
150 msm_host->var_ops->msm_readl_relaxed(host, offset)
153 msm_host->var_ops->msm_writel_relaxed(val, host, offset)
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H A Dsdhci-pci-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
4 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
8 * - JMicron (hardware and technical support)
17 #include <linux/dma-mapping.h>
33 #include <linux/mmc/slot-gpio.h>
41 #include "sdhci.h"
42 #include "sdhci-cqhci.h"
43 #include "sdhci-pci.h"
44 #include "sdhci-uhs2.h"
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H A Dsdhci-pci-arasan.c1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci-pci-arasan.c - Driver for Arasan PCI Controller with
14 #include "sdhci.h"
15 #include "sdhci-pci.h"
105 return -EBUSY; in arasan_phy_addr_poll()
140 return -EBUSY; in arasan_phy_sts_poll()
144 return -EBUSY; in arasan_phy_sts_poll()
159 return -EBUSY; in arasan_phy_init()
162 return -EBUSY; in arasan_phy_init()
184 return -EBUSY; in arasan_phy_init()
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H A Dsdhci-of-dwcmshc.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/arm-smccc.h>
14 #include <linux/dma-mapping.h>
24 #include "sdhci-pltfm.h"
41 /* Tuning and auto-tuning fields in AT_CTRL_R control register */
51 #define AT_CTRL_PRE_CHANGE_DLY 0x1 /* 2-cycle latency */
53 #define AT_CTRL_POST_CHANGE_DLY 0x3 /* 4-cycle latency */
151 #define PHY_PAD_TXSLEW_CTRL_P 0x3 /* Slew control for P-Type pad TX */
153 #define PHY_PAD_TXSLEW_CTRL_N 0x3 /* Slew control for N-Type pad TX */
154 #define PHY_PAD_TXSLEW_CTRL_N_SG2042 0x2 /* Slew control for N-Type pad TX for SG2042 */
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H A Dsdhci-pci-o2micro.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include "sdhci.h"
18 #include "sdhci-pci.h"
101 mmc_hostname(host->mmc)); in sdhci_o2_wait_card_detect_stable()
137 mmc_hostname(host->mmc)); in sdhci_o2_enable_internal_clock()
171 pci_read_config_dword(chip->pdev, in o2_pci_set_baseclk()
177 pci_write_config_dword(chip->pdev, in o2_pci_set_baseclk()
221 host->tuning_done = true; in __sdhci_o2_execute_tuning()
225 mmc_hostname(host->mmc)); in __sdhci_o2_execute_tuning()
233 mmc_hostname(host->mmc)); in __sdhci_o2_execute_tuning()
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H A Dtoshsd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * sdhci.c, copyright (C) 2005-2006 Pierre Ossman
38 pci_write_config_byte(host->pdev, SD_PCICFG_CLKSTOP, in toshsd_init()
40 pci_write_config_byte(host->pdev, SD_PCICFG_CARDDETECT, 2); in toshsd_init()
43 iowrite16(0, host->ioaddr + SD_SOFTWARERESET); /* assert */ in toshsd_init()
45 iowrite16(1, host->ioaddr + SD_SOFTWARERESET); /* deassert */ in toshsd_init()
49 iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL); in toshsd_init()
50 iowrite32(0, host->ioaddr + SD_CARDSTATUS); in toshsd_init()
51 iowrite32(0, host->ioaddr + SD_ERRORSTATUS0); in toshsd_init()
52 iowrite16(0, host->ioaddr + SD_STOPINTERNAL); in toshsd_init()
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/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama7g5ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama7g5ek.dts - Device Tree file for SAMA7G5-EK board
11 /dts-v1/;
12 #include "sama7g5-pinfunc.h"
14 #include <dt-bindings/mfd/atmel-flexcom.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/pinctrl/at91.h>
17 #include <dt-bindings/sound/microchip,pdmc.h>
20 model = "Microchip SAMA7G5-EK";
25 stdout-path = "serial0:115200n8";
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H A Dat91-sama7g54_curiosity.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama7g54_curiosity.dts - Device Tree file for SAMA7G54 Curiosity Board
10 /dts-v1/;
11 #include "sama7g5-pinfunc.h"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/mfd/atmel-flexcom.h>
16 #include <dt-bindings/pinctrl/at91.h>
20 compatible = "microchip,sama7g54-curiosity", "microchip,sama7g5", "microchip,sama7";
28 stdout-path = "serial0:115200n8";
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-nitrogen-r2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
13 reg_vref_1v8: regulator-vref-1v8 {
14 compatible = "regulator-fixed";
15 regulator-name = "vref-1v8";
16 regulator-min-microvolt = <1800000>;
17 regulator-max-microvolt = <1800000>;
20 reg_vref_3v3: regulator-vref-3v3 {
21 compatible = "regulator-fixed";
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/linux/drivers/mmc/core/
H A Dmmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2003-2004 Russell King, All Rights Reserved.
6 * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
59 u32 *resp = card->raw_cid; in mmc_decode_cid()
65 add_device_randomness(&card->raw_cid, sizeof(card->raw_cid)); in mmc_decode_cid()
71 switch (card->csd.mmca_vsn) { in mmc_decode_cid()
72 case 0: /* MMC v1.0 - v1.2 */ in mmc_decode_cid()
74 card->cid.manfid = unstuff_bits(resp, 104, 24); in mmc_decode_cid()
75 card->cid.prod_name[0] = unstuff_bits(resp, 96, 8); in mmc_decode_cid()
76 card->cid.prod_name[1] = unstuff_bits(resp, 88, 8); in mmc_decode_cid()
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/linux/arch/arm64/boot/dts/marvell/
H A Darmada-3720-turris-mox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/bus/moxtet.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include "armada-372x.dtsi"
16 compatible = "cznic,turris-mox", "marvell,armada3720",
28 stdout-path = "serial0:115200n8";
37 compatible = "gpio-leds";
41 linux,default-trigger = "default-on";
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2016-2022 Toradex
6 #include <dt-bindings/pwm/pwm.h>
15 brightness-levels = <0 45 63 88 119 158 203 255>;
16 compatible = "pwm-backlight";
17 default-brightness-level = <4>;
18 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_gpio_bl_on>;
21 power-supply = <&reg_module_3v3>;
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