| /freebsd/sys/dev/isci/scil/ |
| H A D | scu_remote_node_context.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
60 * @brief This file contains the structures and constatns used by the SCU
73 * @brief This structure contains the SCU hardware definition for an SSP
81 * This field is the remote node index assigned for this remote node. All
82 * remote nodes must have a unique remote node index. The value of the remote
83 * node index can not exceed the maximum number of remote nodes reported in
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| H A D | scu_bios_definitions.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
64 * stand-alone where the library is excluded. By excluding
162 * elements corresponds to the number of SCU controller units contained
185 * be set for the Intel SAS Storage Controller Unit (SCU).
190 * Per SCU Controller Data
208 * in APC mode, if ANY of the phy mask is non-zero,
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| H A D | scu_task_context.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
60 * @brief This file contains the structures and constants for the SCU hardware
73 * @brief This enumberation defines the various SSP task types the SCU
76 * The definition for the various task types the SCU hardware will accept can
92 * @brief This enumeration defines the various SATA task types the SCU
95 * The definition for the various task types the SCU hardware will accept can
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| H A D | scu_completion_codes.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
60 * @brief This file contains the constants and macros for the SCU hardware
72 * This macro constructs an SCU completion type
78 * These macros contain the SCU completion types
92 * an SCU completion code.
105 * This macro returns the SCU completion type.
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| H A D | scic_sds_phy_registers.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
61 * to the SCU link layer registers.
71 //* SCU LINK LAYER REGISTER OPERATIONS
81 (phy)->transport_layer_registers->reg \
91 (phy)->transport_layer_registers->reg, \
126 #define SCU_STPTLDARNI_WRITE(phy, index) \ argument
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| H A D | scic_sds_controller_registers.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
61 * to the SCU hardware.
78 (controller)->smu_registers->reg \
84 (controller)->smu_registers->reg, \
96 (controller)->scu_registers->afe.reg, \
103 (controller)->scu_registers->afe.reg \
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| H A D | scic_sds_phy.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
167 U16 index; member
204 * represent the core phy object and SCU hardware protocol engine.
229 * This field specifies the index with which this phy is associated (0-3).
291 * This field is the pointer to the transport layer register for the SCU
297 * This field points to the link layer register set within the SCU.
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| H A D | scic_sds_remote_device.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
101 * the device is placed in when a RNC suspend is received by the SCU hardware.
130 * entered when the device is processing a non-NCQ command. The device object
186 * the device is placed in when a RNC suspend is received by the SCU hardware.
199 * @brief This structure contains the data for an SCU implementation of
200 * the SCU Core device data.
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| H A D | scic_sds_remote_node_table.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
72 * Remote node sets are sets of remote node index in the remtoe node table
73 * The SCU hardware requires that STP remote node entries take three
74 * consecutive remote node index so the table is arranged in sets of three.
145 * Because of the way STP remote node data is allocated on the SCU hardware
147 * entries. For ease of allocation and de-allocation we have broken the
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| H A D | scu_unsolicited_frame.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
57 * @brief This field defines the SCU format of an unsolicited frame (UF). A
58 * UF is a frame received by the SCU for which there is no known
87 * This field indicates if there is an Initiator Index Table entry with
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| H A D | scic_config_parameters.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
61 * methods that can be called by a SCIC user on the SCU Driver
116 * insertion frequency for this phy index.
138 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
139 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
140 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
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| H A D | scic_sds_unsolicited_frame_control.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
84 uf_control->address_table.count = SCU_MIN_UF_TABLE_ENTRIES; in scic_sds_unsolicited_frame_control_set_address_table_count()
86 (uf_control->address_table.count < uf_control->buffers.count) in scic_sds_unsolicited_frame_control_set_address_table_count()
87 && (uf_control->address_table.count < SCU_ABSOLUTE_MAX_UNSOLICITED_FRAMES) in scic_sds_unsolicited_frame_control_set_address_table_count()
90 uf_control->address_table.count <<= 1; in scic_sds_unsolicited_frame_control_set_address_table_count()
112 * be non-zero when there are a non-power of 2 number
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| H A D | scic_sds_port.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
112 * The core port object provides the abstraction for an SCU port.
122 * This field is the port index that is reported to the SCI USER. This allows
124 * different answer for the get port index.
129 * This field is the port index used to program the SCU hardware.
204 * This field is the pointer to the port task scheduler registers for the SCU
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| H A D | scic_sds_stp_packet_request.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
78 * @brief This method will fill in the SCU Task Context for a PACKET fis. And
79 * construct the request STARTED sub-state machine for Packet Protocol
98 h2d_fis->features = h2d_fis->features | ATA_PACKET_FEATURE_DMA; in scic_sds_stp_packet_request_construct()
105 this_request->task_context_buffer in scic_sds_stp_packet_request_construct()
109 &this_request->started_substate_machine, in scic_sds_stp_packet_request_construct()
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| H A D | scic_sds_controller.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
115 * can be used as an index into an array
133 (((U32)(SMU_CQGR_CYCLE_BIT & (x))) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
137 * can be used as an index.
146 * This macro will increment the controllers completion queue index value
147 * and possibly toggle the cycle bit if the completion queue index wraps
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| H A D | sci_status.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
61 * the various sub-components in SCI.
70 * @brief This is the general return status enumeration for non-IO, non-task
90 * This Value indicates that the SCU hardware returned an early response
295 * of messages (MSI-X) is not supported.
337 * INDEX DOES NOT EXIST, usually means exceeding max route index.
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| H A D | scu_registers.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
60 * @brief This file contains the constants and structures for the SCU memory
72 // Generate a value for an SCU register
76 // Generate a bit value for an SCU register
88 // Unions for bitfield definitions of SCU Registers
287 // --------------------------------------------------------------------------
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| H A D | scic_sds_stp_request.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
98 (((POINTER_UINT)(address)) + (sizeof(U32) - 1)) \
99 & ~(sizeof(U32)- 1) \
103 * This macro returns the DWORD-aligned stp command buffer
127 (((POINTER_UINT)(address)) + (sizeof(U32) - 1)) \
128 & ~(sizeof(U32)- 1) \
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| H A D | scic_sds_pci.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
105 // These two registers form the Data/Index pair equivalent in the
106 // SCU. They are only used for access registers in BAR 1, not BAR 0.
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| /freebsd/sys/contrib/device-tree/Bindings/net/can/ |
| H A D | fsl,flexcan.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
11 - Marc Kleine-Budde <mkl@pengutronix.de>
14 - $ref: can-controller.yaml#
19 - enum:
20 - fsl,imx95-flexcan
21 - fsl,imx93-flexcan
22 - fsl,imx8qm-flexcan
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| /freebsd/sys/contrib/device-tree/Bindings/arm/freescale/ |
| H A D | fsl,scu.txt | 2 --------------------------------------------------------------------
4 The System Controller Firmware (SCFW) is a low-level system function
5 which runs on a dedicated Cortex-M core to provide power, clock, and
9 The AP communicates with the SC using a multi-ported MU module found
19 The scu node with the following properties shall be under the /firmware/ node.
22 -------------------
23 - compatible: should be "fsl,imx-scu".
24 - mbox-names: should include "tx0", "tx1", "tx2", "tx3",
27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for
60 i.MX SCU Client Device Node:
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| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | fsl,imx8qxp-pixel-link.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
21 The i.MX8qm/qxp Display Pixel Link is accessed via System Controller Unit(SCU)
27 - fsl,imx8qm-dc-pixel-link
28 - fsl,imx8qxp-dc-pixel-link
30 fsl,dc-id:
33 u8 value representing the display controller index that the pixel link
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8-ss-dma.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/dma/fsl-edma.h>
9 #include <dt-bindings/firmware/imx/rsrc.h>
11 dma_ipg_clk: clock-dma-ipg {
12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <120000000>;
15 clock-output-names = "dma_ipg_clk";
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| /freebsd/sys/contrib/device-tree/src/arm64/apm/ |
| H A D | apm-shadowcat.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Shadowcat SOC
9 compatible = "apm,xgene-shadowcat";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
22 enable-method = "spin-table";
23 cpu-release-addr = <0x1 0x0000fff8>;
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| /freebsd/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | armada-375.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/phy/phy.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
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