| /linux/arch/sparc/include/asm/ |
| H A D | winmacro.h | 50 #define LOAD_PT_YREG(base_reg, scratch) \ argument
51 ld [%base_reg + STACKFRAME_SZ + PT_Y], %scratch; \
52 wr %scratch, 0x0, %y;
59 #define LOAD_PT_ALL(base_reg, pt_psr, pt_pc, pt_npc, scratch) \ argument
60 LOAD_PT_YREG(base_reg, scratch) \
77 #define STORE_PT_YREG(base_reg, scratch) \ argument
78 rd %y, %scratch; \
79 st %scratch, [%base_reg + STACKFRAME_SZ + PT_Y];
92 #define SAVE_BOLIXED_USER_STACK(cur_reg, scratch) \ argument
93 ld [%cur_reg + TI_W_SAVED], %scratch; \
[all …]
|
| /linux/arch/arc/kernel/ |
| H A D | signal.c | 108 uregs.scratch.bta = regs->bta; in stash_usr_regs()
109 uregs.scratch.lp_start = regs->lp_start; in stash_usr_regs()
110 uregs.scratch.lp_end = regs->lp_end; in stash_usr_regs()
111 uregs.scratch.lp_count = regs->lp_count; in stash_usr_regs()
112 uregs.scratch.status32 = regs->status32; in stash_usr_regs()
113 uregs.scratch.ret = regs->ret; in stash_usr_regs()
114 uregs.scratch.blink = regs->blink; in stash_usr_regs()
115 uregs.scratch.fp = regs->fp; in stash_usr_regs()
116 uregs.scratch.gp = regs->r26; in stash_usr_regs()
117 uregs.scratch.r12 = regs->r12; in stash_usr_regs()
[all …]
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| H A D | ptrace.c | 192 REG_IN_ONE(scratch.bta, &ptregs->bta); in genregs_set()
193 REG_IN_ONE(scratch.lp_start, &ptregs->lp_start); in genregs_set()
194 REG_IN_ONE(scratch.lp_end, &ptregs->lp_end); in genregs_set()
195 REG_IN_ONE(scratch.lp_count, &ptregs->lp_count); in genregs_set()
197 REG_IGNORE_ONE(scratch.status32); in genregs_set()
199 REG_IN_ONE(scratch.ret, &ptregs->ret); in genregs_set()
200 REG_IN_ONE(scratch.blink, &ptregs->blink); in genregs_set()
201 REG_IN_ONE(scratch.fp, &ptregs->fp); in genregs_set()
202 REG_IN_ONE(scratch.gp, &ptregs->r26); in genregs_set()
203 REG_IN_ONE(scratch.r12, &ptregs->r12); in genregs_set()
[all …]
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| /linux/drivers/infiniband/hw/irdma/ |
| H A D | uda.h | 40 u32 op, u64 scratch);
43 u64 scratch);
51 struct irdma_ah_info *info, u64 scratch) in irdma_sc_create_ah() argument
54 scratch); in irdma_sc_create_ah()
58 struct irdma_ah_info *info, u64 scratch) in irdma_sc_destroy_ah() argument
61 scratch); in irdma_sc_destroy_ah()
66 u64 scratch) in irdma_sc_create_mcast_grp() argument
69 scratch); in irdma_sc_create_mcast_grp()
74 u64 scratch) in irdma_sc_modify_mcast_grp() argument
77 scratch); in irdma_sc_modify_mcast_grp()
[all …]
|
| /linux/lib/tests/ |
| H A D | kunit_iov_iter.c | 125 u8 *scratch, *buffer; in iov_kunit_copy_to_kvec()
132 scratch = iov_kunit_create_buffer(test, &spages, npages); in iov_kunit_copy_to_kvec()
134 scratch[i] = pattern(i); in iov_kunit_copy_to_kvec()
143 copied = copy_to_iter(scratch, size, &iter); in iov_kunit_copy_to_kvec()
149 /* Build the expected image in the scratch buffer. */ in iov_kunit_copy_to_kvec()
151 memset(scratch, 0, bufsize); in iov_kunit_copy_to_kvec()
154 scratch[i] = pattern(patt++); in iov_kunit_copy_to_kvec()
158 KUNIT_EXPECT_EQ_MSG(test, buffer[i], scratch[i], "at i=%x", i);
159 if (buffer[i] != scratch[i])
175 u8 *scratch, *buffe in iov_kunit_copy_from_kvec()
117 u8 *scratch, *buffer; iov_kunit_copy_to_kvec() local
167 u8 *scratch, *buffer; iov_kunit_copy_from_kvec() local
276 u8 *scratch, *buffer; iov_kunit_copy_to_bvec() local
330 u8 *scratch, *buffer; iov_kunit_copy_from_bvec() local
431 u8 *scratch, *buffer; iov_kunit_copy_to_folioq() local
493 u8 *scratch, *buffer; iov_kunit_copy_from_folioq() local
593 u8 *scratch, *buffer; iov_kunit_copy_to_xarray() local
651 u8 *scratch, *buffer; iov_kunit_copy_from_xarray() local
1023 u8 *buffer, *scratch; global() member
[all...] |
| /linux/drivers/mmc/host/ |
| H A D | sdhci-pci-o2micro.c | 112 u16 scratch; in sdhci_o2_enable_internal_clock() local
132 scratch = sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
133 if (scratch & O2_PLL_LOCK_STATUS) in sdhci_o2_enable_internal_clock()
321 u16 scratch = 0; in sdhci_o2_execute_tuning() local
338 scratch = sdhci_readw(host, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
339 scratch |= O2_SD_PWR_FORCE_L0; in sdhci_o2_execute_tuning()
340 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
420 scratch = sdhci_readw(host, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
421 scratch &= ~(O2_SD_PWR_FORCE_L0); in sdhci_o2_execute_tuning()
422 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
[all …]
|
| H A D | mmc_spi.c | 97 /* "scratch" is per-{command,block} data exchanged with the card */
98 struct scratch { struct
122 struct scratch *data; argument
227 * be stored in the scratch buffer. It's somewhere after the in mmc_spi_response_get()
402 struct scratch *data = host->data; in mmc_spi_command_send()
512 struct scratch *scratch = host->data; in mmc_spi_setup_data_message() local
524 scratch->data_token = SPI_TOKEN_MULTI_WRITE; in mmc_spi_setup_data_message()
526 scratch->data_token = SPI_TOKEN_SINGLE; in mmc_spi_setup_data_message()
527 t->tx_buf = &scratch->data_token; in mmc_spi_setup_data_message()
545 t->tx_buf = &scratch->crc_val; in mmc_spi_setup_data_message()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_dc_resource_mgmt.c | 62 bool is_plane_duplicate = dml2->v20.scratch.plane_duplicate_exists; in get_plane_id()
132 …ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[state->res_ctx.pipe_ctx[i].pip… in find_master_pipe_of_plane()
155 ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[pipe->pipe_idx], in find_pipes_assigned_to_plane()
546 struct dc_pipe_mapping_scratch *scratch, in add_odm_slice_to_odm_tree() argument
555 …ASSERT(scratch->pipe_pool.num_pipes_assigned_to_plane_for_mpcc_combine == 1 || scratch->pipe_pool.… in add_odm_slice_to_odm_tree()
557 for (i = 0; i < scratch->pipe_pool.num_pipes_assigned_to_plane_for_mpcc_combine; i++) { in add_odm_slice_to_odm_tree()
558 pipe = &state->res_ctx.pipe_ctx[scratch->pipe_pool.pipes_assigned_to_plane[odm_slice_index][i]]; in add_odm_slice_to_odm_tree()
560 if (scratch->mpc_info.prev_odm_pipe) in add_odm_slice_to_odm_tree()
561 scratch->mpc_info.prev_odm_pipe->next_odm_pipe = pipe; in add_odm_slice_to_odm_tree()
563 pipe->prev_odm_pipe = scratch->mpc_info.prev_odm_pipe; in add_odm_slice_to_odm_tree()
[all …]
|
| H A D | dml2_wrapper_fpu.c | 88 …dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[num_pipes] = dml2->v20.scratch.… in map_hw_resources()
89 dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[num_pipes] = true; in map_hw_resources()
90 …dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id[num_pipes] = dml2->v20.scratch.d… in map_hw_resources()
91 dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id_valid[num_pipes] = true; in map_hw_resources()
102 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in pack_and_call_dml_mode_support_ex()
163 …struct dml2_calculate_lowest_supported_state_for_temp_read_scratch *s = &dml2->v20.scratch.dml2_ca… in calculate_lowest_supported_state_for_temp_read()
164 struct dml2_wrapper_scratch *s_global = &dml2->v20.scratch; in calculate_lowest_supported_state_for_temp_read()
272 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in dml_mode_support_wrapper()
370 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in call_dml_mode_support_and_programming()
405 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in dml2_validate_and_build_resource()
[all …]
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| /linux/drivers/scsi/aic94xx/ |
| H A D | aic94xx_reg_def.h | 1958 * Sequencers (Central and Link) Scratch RAM page definitions.
1962 * The Central Management Sequencer (CSEQ) Scratch Memory is a 1024
1968 * dependent scratch memory, Mode 8, page 0-3 overlaps mode
1969 * independent scratch memory, pages 0-3.
1970 * - 896 bytes of mode dependent scratch, 96 bytes per Modes 0-7, and
1972 * - 259 bytes of mode independent scratch, common to modes 0-15.
1974 * Sequencer scratch RAM is 1024 bytes. This scratch memory is
1975 * divided into mode dependent and mode independent scratch with this
1977 * pages (160 bytes) of mode independent scratch and 3 pages of
1978 * dependent scratch memory for modes 0-7 (768 bytes). Mode 8 pages
[all …]
|
| /linux/arch/arc/include/asm/ |
| H A D | irqflags-compact.h | 185 .macro IRQ_DISABLE scratch
186 lr \scratch, [status32]
187 bic \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
188 flag \scratch
192 .macro IRQ_ENABLE scratch
194 lr \scratch, [status32]
195 or \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
196 flag \scratch
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/ |
| H A D | dml2_pmo_dcn4_fams2.c | 972 struct dml2_pmo_scratch *s = &pmo->scratch; in build_synchronized_timing_groups()
1009 set_bit_in_bitfield(&pmo->scratch.pmo_dcn4.synchronized_timing_group_masks[timing_group_idx], j); in build_synchronized_timing_groups()
1029 valid &= is_bit_set_in_bitfield(pmo->scratch.pmo_dcn4.stream_vactive_capability_mask, i); in all_timings_support_vactive()
1047 if (mask != pmo->scratch.pmo_dcn4.synchronized_timing_group_masks[i]) { in all_timings_support_vblank()
1078 stream_pstate_meta = &pmo->scratch.pmo_dcn4.stream_pstate_meta[i]; in all_timings_support_drr()
1156 stream_pstate_meta = &pmo->scratch.pmo_dcn4.stream_pstate_meta[i]; in all_timings_support_svp()
1162 microschedule_vlines = calc_svp_microschedule(&pmo->scratch.pmo_dcn4.stream_pstate_meta[i]); in all_timings_support_svp()
1183 void dcn4_insert_into_candidate_list(const struct dml2_pmo_pstate_strategy *pstate_strategy, int stream_count, struct dml2_pmo_scratch *scratch) in insert_into_candidate_list() argument
1186 scratch->pmo_dcn4.pstate_strategy_candidates[scratch in insert_into_candidate_list()
2016 struct dml2_pmo_scratch *scratch = &pmo->scratch; setup_planes_for_svp_by_mask() local
2039 struct dml2_pmo_scratch *scratch = &pmo->scratch; setup_planes_for_svp_drr_by_mask() local
2139 struct dml2_pmo_scratch *scratch = &pmo->scratch; setup_display_config() local
[all...] |
| /linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-fau.h | 318 * @scraddr: Scratch pad byte address to write to. Must be 8 byte aligned
353 * placed in the scratch memory at byte address scraddr.
355 * @scraddr: Scratch memory byte address to put response in.
361 * Returns Placed in the scratch pad register
373 * placed in the scratch memory at byte address scraddr.
375 * @scraddr: Scratch memory byte address to put response in.
381 * Returns Placed in the scratch pad register
393 * placed in the scratch memory at byte address scraddr.
395 * @scraddr: Scratch memory byte address to put response in.
400 * Returns Placed in the scratch pad register
[all …]
|
| /linux/arch/riscv/kernel/ |
| H A D | module-sections.c | 119 Elf_Rela *scratch = NULL; in module_frob_arch_sections()
167 scratch_size_needed = (num_scratch_relas + num_relas) * sizeof(*scratch); in module_frob_arch_sections()
170 new_scratch = kvrealloc(scratch, scratch_size, GFP_KERNEL); in module_frob_arch_sections()
172 kvfree(scratch); in module_frob_arch_sections()
175 scratch = new_scratch; in module_frob_arch_sections()
180 scratch[num_scratch_relas++] = relas[j]; in module_frob_arch_sections()
183 if (scratch) { in module_frob_arch_sections()
185 sort(scratch, num_scratch_relas, sizeof(*scratch), cmp_rela, NULL); in module_frob_arch_sections()
186 count_max_entries(scratch, num_scratch_rela in module_frob_arch_sections()
121 Elf_Rela *scratch = NULL; module_frob_arch_sections() local
[all...] |
| /linux/drivers/net/wireless/intel/iwlwifi/pcie/ |
| H A D | iwl-context-info-v2.h | 38 * enum iwl_prph_scratch_flags - PRPH scratch control flags
82 * enum iwl_prph_scratch_ext_flags - PRPH scratch control ext flags
98 * @version: prph scratch information version id
121 * struct iwl_prph_scratch_pnvm_cfg - PNVM scratch
164 * struct iwl_prph_scratch_uefi_cfg - prph scratch reduce power table
176 * struct iwl_prph_scratch_step_cfg - prph scratch step configuration
190 * struct iwl_prph_scratch_ctrl_cfg - prph scratch ctrl and config
223 * struct iwl_prph_scratch - peripheral scratch mapping
224 * @ctrl_cfg: control and configuration of prph scratch
292 * @prph_scratch_base_addr: the peripheral scratch structure start address
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 2158 /* Set a pipe unlock order based on the change in DET allocation and stores it in dc scratch memory
2175 memset(dc->scratch.pipes_to_unlock_first, 0, sizeof(dc->scratch.pipes_to_unlock_first)); in determine_pipe_unlock_order()
2188 dc->scratch.pipes_to_unlock_first[i] = true; in determine_pipe_unlock_order()
3511 struct dc_scratch_space *scratch,
3521 dc_plane_copy_config(&scratch->plane_states[i], status->plane_states[i]); in backup_and_set_minimal_pipe_split_policy()
3523 scratch->stream_state = *stream; in backup_and_set_minimal_pipe_split_policy()
3527 struct dc_scratch_space *scratch, in backup_and_set_minimal_pipe_split_policy()
3537 dc_plane_copy_config(status->plane_states[i], &scratch->plane_states[i]); in backup_and_set_minimal_pipe_split_policy()
3542 *stream = scratch in restore_minimal_pipe_split_policy()
3434 backup_planes_and_stream_state(struct dc_scratch_space * scratch,struct dc_stream_state * stream) backup_planes_and_stream_state() argument
3450 restore_planes_and_stream_state(struct dc_scratch_space * scratch,struct dc_stream_state * stream) restore_planes_and_stream_state() argument
5528 struct dc_update_scratch_space *scratch = dc_update_planes_and_stream_init( dc_update_planes_and_stream() local
7300 update_planes_and_stream_prepare_v2(struct dc_update_scratch_space * scratch) update_planes_and_stream_prepare_v2() argument
7315 update_planes_and_stream_execute_v2(const struct dc_update_scratch_space * scratch) update_planes_and_stream_execute_v2() argument
7323 update_planes_and_stream_cleanup_v2(const struct dc_update_scratch_space * scratch) update_planes_and_stream_cleanup_v2() argument
7338 update_planes_and_stream_prepare_v3_intermediate_seamless(struct dc_update_scratch_space * scratch) update_planes_and_stream_prepare_v3_intermediate_seamless() argument
7358 update_planes_and_stream_prepare_v3(struct dc_update_scratch_space * scratch) update_planes_and_stream_prepare_v3() argument
7466 update_planes_and_stream_execute_v3_commit(const struct dc_update_scratch_space * scratch,bool intermediate_update,bool intermediate_context,bool use_stream_update) update_planes_and_stream_execute_v3_commit() argument
7485 update_planes_and_stream_execute_v3(const struct dc_update_scratch_space * scratch) update_planes_and_stream_execute_v3() argument
7522 update_planes_and_stream_cleanup_v3_release_minimal(struct dc_update_scratch_space * scratch,bool backup) update_planes_and_stream_cleanup_v3_release_minimal() argument
7535 update_planes_and_stream_cleanup_v3_intermediate(struct dc_update_scratch_space * scratch,bool backup) update_planes_and_stream_cleanup_v3_intermediate() argument
7545 update_planes_and_stream_cleanup_v3(struct dc_update_scratch_space * scratch) update_planes_and_stream_cleanup_v3() argument
7596 struct dc_update_scratch_space *scratch = stream->update_scratch; dc_update_planes_and_stream_init() local
7612 dc_update_planes_and_stream_prepare(struct dc_update_scratch_space * scratch) dc_update_planes_and_stream_prepare() argument
7621 dc_update_planes_and_stream_execute(const struct dc_update_scratch_space * scratch) dc_update_planes_and_stream_execute() argument
7630 dc_update_planes_and_stream_cleanup(struct dc_update_scratch_space * scratch) dc_update_planes_and_stream_cleanup() argument
[all...] |
| /linux/tools/testing/selftests/powerpc/copyloops/asm/ |
| H A D | ppc_asm.h | 50 #define DCBT_SETUP_STREAMS(from, from_parms, to, to_parms, scratch) \ argument
51 lis scratch,0x8000; /* GO=1 */ \
52 clrldi scratch,scratch,32; \
60 dcbt 0,scratch,0b01010; /* all streams GO */
|
| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | selftest_workarounds.c | 503 struct i915_vma *scratch; in check_dirty_whitelist() local
509 scratch = __vm_create_scratch_for_read_pinned(ce->vm, sz); in check_dirty_whitelist()
510 if (IS_ERR(scratch)) in check_dirty_whitelist()
511 return PTR_ERR(scratch); in check_dirty_whitelist()
522 u64 addr = i915_vma_offset(scratch); in check_dirty_whitelist()
540 err = i915_gem_object_lock(scratch->obj, &ww); in check_dirty_whitelist()
554 results = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB); in check_dirty_whitelist()
604 GEM_BUG_ON(idx * sizeof(u32) > scratch->size); in check_dirty_whitelist()
635 err = i915_vma_move_to_active(scratch, rq, in check_dirty_whitelist()
730 i915_gem_object_unpin_map(scratch in check_dirty_whitelist()
1061 struct i915_vma *scratch[2]; live_isolated_whitelist() member
[all...] |
| H A D | gen8_ppgtt.c | 243 const struct drm_i915_gem_object * const scratch = vm->scratch[lvl]; in __gen8_ppgtt_clear() local
261 clear_pd_entry(pd, idx, scratch); in __gen8_ppgtt_clear()
293 vm->scratch[0]->encode, in __gen8_ppgtt_clear()
300 if (release_pd_entry(pd, idx, pt, scratch)) in __gen8_ppgtt_clear()
351 fill_px(pt, vm->scratch[lvl]->encode); in __gen8_ppgtt_alloc()
714 * the 64K PTE, it will read/write into the scratch page in gen8_ppgtt_insert_huge()
721 encode = vm->scratch[0]->encode; in gen8_ppgtt_insert_huge()
833 * If everybody agrees to not to write into the scratch page, in gen8_init_scratch()
843 vm->scratch[i] = i915_gem_object_get(clone->scratch[i]); in gen8_init_scratch()
853 if (i915_gem_object_is_lmem(vm->scratch[0])) in gen8_init_scratch()
[all …]
|
| /linux/drivers/usb/host/ |
| H A D | ehci-dbg.c | 373 u32 scratch; in qh_lines() local
396 scratch = hc32_to_cpup(ehci, &hw->hw_info1); in qh_lines()
401 qh, scratch & 0x007f, in qh_lines()
402 speed_char (scratch), in qh_lines()
403 (scratch >> 8) & 0x000f, in qh_lines()
404 scratch, hc32_to_cpup(ehci, &hw->hw_info2), in qh_lines()
420 scratch = hc32_to_cpup(ehci, &td->hw_token); in qh_lines()
426 } else if (QTD_LENGTH(scratch)) { in qh_lines()
432 switch ((scratch >> 8) & 0x03) { in qh_lines()
450 (scratch >> 16) & 0x7fff, in qh_lines()
[all …]
|
| /linux/arch/x86/include/asm/ |
| H A D | bootparam_utils.h | 52 static struct boot_params scratch; in sanitize_boot_params() local
54 char *save_base = (char *)&scratch; in sanitize_boot_params()
68 BOOT_PARAM_PRESERVE(scratch), in sanitize_boot_params()
80 memset(&scratch, 0, sizeof(scratch)); in sanitize_boot_params()
|
| /linux/arch/mips/mm/ |
| H A D | tlbex.c | 757 * TMP and PTR are scratch.
847 * BVADDR is the faulting address, PTR is scratch.
923 * TMP and PTR are scratch.
1056 const int scratch = 1; /* Our extra working register */ in build_fast_tlb_refill_handler() local
1058 rv.huge_pte = scratch; in build_fast_tlb_refill_handler()
1071 UASM_i_MTC0(p, scratch, c0_kscratch(), c0_scratch_reg); in build_fast_tlb_refill_handler()
1073 UASM_i_SW(p, scratch, scratchpad_offset(0), 0); in build_fast_tlb_refill_handler()
1075 uasm_i_dsrl_safe(p, scratch, tmp, in build_fast_tlb_refill_handler()
1077 uasm_il_bnez(p, r, scratch, label_vmalloc); in build_fast_tlb_refill_handler()
1093 UASM_i_MTC0(p, scratch, c0_kscratch(), c0_scratch_reg); in build_fast_tlb_refill_handler()
[all …]
|
| /linux/kernel/liveupdate/ |
| H A D | kexec_handover.c | 524 * be anywhere in physical address space. The scratch regions give us a
526 * can later safely load our new kexec images into and then use the scratch in kho_parse_scratch_size()
534 * The scratch areas are scaled by default as percent of memory allocated from in kho_parse_scratch_size()
540 * per-node scratch areas: in kho_parse_scratch_size()
577 pr_notice("scratch scale is %d%%\n", scratch_scale); in kho_parse_scratch_size()
610 pr_notice("scratch areas: lowmem: %lluMiB global: %lluMiB pernode: %lldMiB\n", in scratch_size_update()
640 * Scratch areas are released as MIGRATE_CMA. Round them up to the right in kho_reserve_scratch()
686 pr_err("Failed to reserve scratch array\n"); in kho_reserve_scratch()
691 * reserve scratch area in low memory for lowmem allocations in the in kho_reserve_scratch()
698 pr_err("Failed to reserve lowmem scratch buffe in kho_reserve_scratch()
1628 struct kho_scratch *scratch = NULL; kho_populate() local
1716 struct kexec_buf scratch; kho_fill_kimage() local
[all...] |
| /linux/drivers/gpu/drm/i915/selftests/ |
| H A D | i915_perf.c | 296 void *scratch; in live_noa_gpr() local
315 /* Poison the ce->vm so we detect writes not to the GGTT gt->scratch */ in live_noa_gpr()
316 scratch = __px_vaddr(ce->vm->scratch[0]); in live_noa_gpr()
317 memset(scratch, POISON_FREE, PAGE_SIZE); in live_noa_gpr()
404 /* Verify that the user's scratch page was not used for GPR storage */ in live_noa_gpr()
405 if (memchr_inv(scratch, POISON_FREE, PAGE_SIZE)) { in live_noa_gpr()
406 pr_err("Scratch page overwritten!\n"); in live_noa_gpr()
407 igt_hexdump(scratch, 4096); in live_noa_gpr()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4.c | 305 struct dml2_core_scratch *scratch) in expand_implict_subvp()
313 memset(scratch->main_stream_index_from_svp_stream_index, 0, sizeof(int) * DML2_MAX_PLANES); in expand_implict_subvp()
314 memset(scratch->svp_stream_index_from_main_stream_index, 0, sizeof(int) * DML2_MAX_PLANES); in expand_implict_subvp()
315 memset(scratch->main_plane_index_to_phantom_plane_index, 0, sizeof(int) * DML2_MAX_PLANES); in expand_implict_subvp()
328 scratch->main_stream_index_from_svp_stream_index[stream_index] = stream_index; in expand_implict_subvp()
329 scratch->svp_stream_index_from_main_stream_index[stream_index] = stream_index; in expand_implict_subvp()
337 scratch->main_stream_index_from_svp_stream_index[svp_expanded_display_cfg->num_streams] = stream_index; in expand_implict_subvp()
338 scratch->svp_stream_index_from_main_stream_index[stream_index] = svp_expanded_display_cfg->num_streams; in expand_implict_subvp()
351 phantom_stream = &svp_expanded_display_cfg->stream_descriptors[scratch->svp_stream_index_from_main_stream_index[main_plane->stream_index]]; in expand_implict_subvp()
353 main_plane, phantom_stream, scratch in expand_implict_subvp()
304 expand_implict_subvp(const struct display_configuation_with_meta * display_cfg,struct dml2_display_cfg * svp_expanded_display_cfg,struct dml2_core_scratch * scratch) expand_implict_subvp() argument
368 pack_mode_programming_params_with_implicit_subvp(struct dml2_core_instance * core,const struct display_configuation_with_meta * display_cfg,const struct dml2_display_cfg * svp_expanded_display_cfg,struct dml2_display_cfg_programming * programming,struct dml2_core_scratch * scratch) pack_mode_programming_params_with_implicit_subvp() argument
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