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/linux/Documentation/devicetree/bindings/serial/
H A Drenesas,scif.yaml4 $id: http://devicetree.org/schemas/serial/renesas,scif.yaml#
7 title: Renesas Serial Communication Interface with FIFO (SCIF)
17 - renesas,scif-r7s72100 # RZ/A1H
18 - const: renesas,scif # generic SCIF compatible UART
22 - renesas,scif-r7s9210 # RZ/A2
26 - renesas,scif-r8a7778 # R-Car M1
27 - renesas,scif-r8a7779 # R-Car H1
28 - const: renesas,rcar-gen1-scif # R-Car Gen1
29 - const: renesas,scif # generic SCIF compatible UART
33 - renesas,scif-r8a7742 # RZ/G1H
[all …]
/linux/arch/sh/include/mach-common/mach/
H A Dhighlander.h105 #define PA_SCSMR (PA_BCR+0x0400) /* SCIF Serial mode control */
106 #define PA_SCBRR (PA_BCR+0x0402) /* SCIF Bit rate control */
107 #define PA_SCSCR (PA_BCR+0x0404) /* SCIF Serial control */
108 #define PA_SCFDTR (PA_BCR+0x0406) /* SCIF Send FIFO control */
109 #define PA_SCFSR (PA_BCR+0x0408) /* SCIF Serial status control */
110 #define PA_SCFRDR (PA_BCR+0x040a) /* SCIF Receive FIFO control */
111 #define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */
112 #define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */
113 #define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */
/linux/arch/arm/boot/dts/renesas/
H A Dr8a77470.dtsi74 /* External SCIF clock */
75 scif_clk: scif {
627 compatible = "renesas,scif-r8a77470",
628 "renesas,rcar-gen2-scif", "renesas,scif";
643 compatible = "renesas,scif-r8a77470",
644 "renesas,rcar-gen2-scif", "renesas,scif";
659 compatible = "renesas,scif-r8a77470",
660 "renesas,rcar-gen2-scif", "renesas,scif";
675 compatible = "renesas,scif-r8a77470",
676 "renesas,rcar-gen2-scif", "renesas,scif";
[all …]
H A Dr8a7792.dtsi102 /* External SCIF clock */
103 scif_clk: scif {
638 compatible = "renesas,scif-r8a7792",
639 "renesas,rcar-gen2-scif", "renesas,scif";
654 compatible = "renesas,scif-r8a7792",
655 "renesas,rcar-gen2-scif", "renesas,scif";
670 compatible = "renesas,scif-r8a7792",
671 "renesas,rcar-gen2-scif", "renesas,scif";
686 compatible = "renesas,scif-r8a7792",
687 "renesas,rcar-gen2-scif", "renesas,scif";
H A Dr8a7794.dtsi112 /* External SCIF clock */
113 scif_clk: scif {
826 compatible = "renesas,scif-r8a7794",
827 "renesas,rcar-gen2-scif",
828 "renesas,scif";
843 compatible = "renesas,scif-r8a7794",
844 "renesas,rcar-gen2-scif",
845 "renesas,scif";
860 compatible = "renesas,scif-r8a7794",
861 "renesas,rcar-gen2-scif", "renesas,scif";
[all …]
H A Dr8a7793.dtsi130 /* External SCIF clock */
131 scif_clk: scif {
850 compatible = "renesas,scif-r8a7793",
851 "renesas,rcar-gen2-scif", "renesas,scif";
866 compatible = "renesas,scif-r8a7793",
867 "renesas,rcar-gen2-scif", "renesas,scif";
882 compatible = "renesas,scif-r8a7793",
883 "renesas,rcar-gen2-scif", "renesas,scif";
898 compatible = "renesas,scif-r8a7793",
899 "renesas,rcar-gen2-scif", "renesas,scif";
[all …]
H A Dr8a7791.dtsi145 /* External SCIF clock */
146 scif_clk: scif {
956 compatible = "renesas,scif-r8a7791",
957 "renesas,rcar-gen2-scif", "renesas,scif";
972 compatible = "renesas,scif-r8a7791",
973 "renesas,rcar-gen2-scif", "renesas,scif";
988 compatible = "renesas,scif-r8a7791",
989 "renesas,rcar-gen2-scif", "renesas,scif";
1004 compatible = "renesas,scif-r8a7791",
1005 "renesas,rcar-gen2-scif", "renesas,scif";
[all …]
H A Dr7s9210.dtsi72 compatible = "renesas,scif-r7s9210";
89 compatible = "renesas,scif-r7s9210";
106 compatible = "renesas,scif-r7s9210";
123 compatible = "renesas,scif-r7s9210";
140 compatible = "renesas,scif-r7s9210";
H A Dr8a7790.dtsi258 /* External SCIF clock */
259 scif_clk: scif {
968 compatible = "renesas,scif-r8a7790",
969 "renesas,rcar-gen2-scif",
970 "renesas,scif";
985 compatible = "renesas,scif-r8a7790",
986 "renesas,rcar-gen2-scif",
987 "renesas,scif";
1002 compatible = "renesas,scif-r8a7790",
1003 "renesas,rcar-gen2-scif",
[all …]
/linux/arch/sh/kernel/cpu/sh4/
H A Dsetup-sh7750.c185 TMU3, TMU4, TMU0, TMU1, TMU2, RTC, SCI1, SCIF, WDT, REF, enumerator
199 INTC_VECT(SCIF, 0x700), INTC_VECT(SCIF, 0x720),
200 INTC_VECT(SCIF, 0x740), INTC_VECT(SCIF, 0x760),
208 { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, SCIF, HUDI } },
/linux/include/uapi/linux/
H A Dscif_ioctl.h51 * Intel SCIF driver.
56 * SCIF IOCTL interface information
65 * struct scif_port_id - SCIF port information
139 * struct scifioctl_copy - used for SCIF DMA copy IOCTLs
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77995.dtsi81 scif_clk: scif {
879 compatible = "renesas,scif-r8a77995",
880 "renesas,rcar-gen3-scif", "renesas,scif";
896 compatible = "renesas,scif-r8a77995",
897 "renesas,rcar-gen3-scif", "renesas,scif";
913 compatible = "renesas,scif-r8a77995",
914 "renesas,rcar-gen3-scif", "renesas,scif";
930 compatible = "renesas,scif-r8a77995",
931 "renesas,rcar-gen3-scif", "renesas,scif";
946 compatible = "renesas,scif-r8a77995",
[all …]
H A Dr9a07g043.dtsi281 compatible = "renesas,scif-r9a07g043",
282 "renesas,scif-r9a07g044";
300 compatible = "renesas,scif-r9a07g043",
301 "renesas,scif-r9a07g044";
319 compatible = "renesas,scif-r9a07g043",
320 "renesas,scif-r9a07g044";
338 compatible = "renesas,scif-r9a07g043",
339 "renesas,scif-r9a07g044";
357 compatible = "renesas,scif-r9a07g043",
358 "renesas,scif-r9a07g044";
H A Dr8a779f0.dtsi291 /* External SCIF clock - to be overridden by boards that provide it */
292 scif_clk: scif {
1003 compatible = "renesas,scif-r8a779f0",
1004 "renesas,rcar-gen4-scif", "renesas,scif";
1020 compatible = "renesas,scif-r8a779f0",
1021 "renesas,rcar-gen4-scif", "renesas,scif";
1037 compatible = "renesas,scif-r8a779f0",
1038 "renesas,rcar-gen4-scif", "renesas,scif";
1054 compatible = "renesas,scif-r8a779f0",
1055 "renesas,rcar-gen4-scif", "renesas,scif";
H A Dr9a07g054.dtsi496 compatible = "renesas,scif-r9a07g054",
497 "renesas,scif-r9a07g044";
515 compatible = "renesas,scif-r9a07g054",
516 "renesas,scif-r9a07g044";
534 compatible = "renesas,scif-r9a07g054",
535 "renesas,scif-r9a07g044";
553 compatible = "renesas,scif-r9a07g054",
554 "renesas,scif-r9a07g044";
572 compatible = "renesas,scif-r9a07g054",
573 "renesas,scif-r9a07g044";
/linux/drivers/tty/serial/
H A Dsh-sci.h86 /* SCxSR (Serial Status Register) on SCIF, SCIFA, SCIFB, HSCIF */
95 /* SCIF only (optional) */
98 /*SCIFA/SCIFB and SCIF on SH7705/SH7720/SH7721 only */
118 /* SCLSR (Line Status Register) on (H)SCIF */
154 * BRG Clock Select Register (Some SCIF and HSCIF)
H A Dsh-sci.c7 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
15 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
225 * Common SH-2(A) SCIF definitions for ports with FIFO data
253 * It looks like a normal SCIF with FIFO data, but with a
282 * The "SCIF" that is in RZ/V2H(P) SoC is similar to one found on RZ/G2L SoC
315 * Common SH-3 SCIF definitions.
339 * Common SH-4(A) SCIF(B) definitions.
365 * Common SCIF definitions for ports with a Baud Rate Generator for
425 * Common SH-4(A) SCIF(B) definitions for ports without an SCSPTR
451 * Common SH-4(A) SCIF(B) definitions for ports with FIFO data
[all …]
/linux/arch/sh/include/cpu-sh4/cpu/
H A Dsh7757.h167 /* PTK (mobule: SERMUX, LBSC, SCIF) */
173 /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */
232 /* PTW (mobule: LBSC, EVC, SCIF) */
238 /* PTX (mobule: LBSC, SCIF, SIM) */
H A Dsh7723.h111 /* SCIF0 (SCIF: 3 pin PTT/PTU) */
115 /* SCIF1 (SCIF: 3 pin PTS/PTV) */
119 /* SCIF2 (SCIF: 3 pin PTT/PTU) */
H A Dshx3.h38 /* SCIF */
/linux/arch/arm/include/debug/
H A Drenesas-scif.S3 * Renesas SCIF(A) debugging macro include header
23 /* SCIF */
/linux/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7366.c261 SCIF, SCIFA1, SCIFA2, enumerator
289 INTC_VECT(SCIF, 0xc00), INTC_VECT(SCIFA1, 0xc20),
327 { 0, DMAC_DADERR, DMAC5, DMAC4, DENC, SCIFA2, SCIFA1, SCIF } },
352 { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF, SCIFA1, SCIFA2, DENC } },
H A Dsetup-sh7343.c317 SCIF, SCIF1, SCIF2, SCIF3, enumerator
350 INTC_VECT(SCIF, 0xc00), INTC_VECT(SCIF1, 0xc20),
390 { KEYSC, DMAC_DADERR, DMAC5, DMAC4, SCIF3, SCIF2, SCIF1, SCIF } },
413 { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF, SCIF1, SCIF2, SCIF3 } },
/linux/arch/sh/kernel/cpu/sh3/
H A Dserial-sh7720.c15 /* Clear PTCR bit 9-2; enable all scif pins but sck */ in sh7720_sci_init_pins()
/linux/include/linux/
H A Dserial_sci.h53 unsigned int type; /* SCI / SCIF / IRDA / HSCIF */

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