| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | snps,dw-umctl2-ddrc.yaml | 70 enum: [ pclk, aclk, core, sbr ]
82 enum: [ prst, arst, core, sbr ]
115 clock-names = "pclk", "aclk", "core", "sbr";
|
| /linux/drivers/infiniband/hw/hfi1/ |
| H A D | pcie.c | 768 * before the SBR for the Pcie Gen3.
792 * Trigger a secondary bus reset (SBR) on ourselves using our parent.
818 * This is an end around to do an SBR during probe time. A new API needs in trigger_sbr()
1011 /* hold the SBus resource across the firmware download and SBR */ in do_pcie_gen3_transition()
1047 * will be performed automatically after the SBR when the target in do_pcie_gen3_transition()
1233 /* hold DC in reset across the SBR */ in do_pcie_gen3_transition()
1236 /* save firmware control across the SBR */ in do_pcie_gen3_transition()
1251 * step 7: initiate the secondary bus reset (SBR) in do_pcie_gen3_transition()
1266 "%s: read of VendorID failed after SBR, err %d\n", in do_pcie_gen3_transition()
1272 dd_dev_info(dd, "%s: VendorID is all 1s after SBR\n", __func__); in do_pcie_gen3_transition()
[all …]
|
| /linux/drivers/tty/serial/ |
| H A D | fsl_lpuart.c | 2005 unsigned int sbr, brfa; in lpuart_set_termios() local
2123 sbr = port->uartclk / (16 * baud); in lpuart_set_termios()
2124 brfa = ((port->uartclk - (16 * sbr * baud)) * 2) / baud; in lpuart_set_termios()
2126 bdh |= (sbr >> 8) & 0x1F; in lpuart_set_termios()
2131 writeb(sbr & 0xFF, port->membase + UARTBDL); in lpuart_set_termios()
2153 u32 sbr, osr, baud_diff, tmp_osr, tmp_sbr, tmp_diff, baud; in __lpuart32_serial_setbrg() local
2163 * Baud Rate = baud clock / ((OSR+1) × SBR) in __lpuart32_serial_setbrg()
2167 sbr = 0; in __lpuart32_serial_setbrg()
2170 /* calculate the temporary sbr value */ in __lpuart32_serial_setbrg()
2177 * osr and sbr values in __lpuart32_serial_setbrg()
[all …]
|
| /linux/arch/mips/include/asm/ |
| H A D | bmips-spaces.h | 5 /* Avoid collisions with system base register (SBR) region on BMIPS3300 */
|
| /linux/arch/mips/include/asm/mach-bmips/ |
| H A D | spaces.h | 13 /* Avoid collisions with system base register (SBR) region on BMIPS3300 */
|
| /linux/sound/soc/intel/atom/ |
| H A D | sst-mfld-dsp.h | 337 u8 bdownsample; /*SBR downsampling 0 - disable 1 -enabled AAC+ only */
341 u8 sbr_signalling;/*disable/enable/set automode the SBR tool.AAC+*/
|
| /linux/drivers/scsi/mpt3sas/ |
| H A D | mpt3sas_ctl.h | 459 * struct mpt3_enable_diag_sbr_reload - enable sbr reload
|
| H A D | mpt3sas_ctl.c | 2611 * _ctl_enable_diag_sbr_reload - enable sbr reload bit
2615 * Enable the SBR reload bit
2652 ioc_err(ioc, "%s: Failed to set Diag SBR Reload Bit\n", __func__); in _ctl_enable_diag_sbr_reload()
2656 ioc_info(ioc, "%s: Successfully set the Diag SBR Reload Bit\n", __func__); in _ctl_enable_diag_sbr_reload()
|
| /linux/drivers/platform/x86/intel/pmc/ |
| H A D | lnl.c | 352 {"SBR", 0, 1},
|
| /linux/arch/arm64/boot/dts/apple/ |
| H A D | s800-0-3-pmgr.dtsi | 58 label = "sbr";
|
| H A D | t8010-pmgr.dtsi | 58 label = "sbr";
|
| H A D | s8001-pmgr.dtsi | 58 label = "sbr";
|
| H A D | t8011-pmgr.dtsi | 67 label = "sbr";
|
| H A D | t8012-pmgr.dtsi | 66 label = "sbr";
|
| H A D | t8112-pmgr.dtsi | 15 label = "sbr";
|
| /linux/drivers/net/ethernet/mellanox/mlxsw/ |
| H A D | pci.c | 1803 goto sbr; in mlxsw_pci_reset_at_pci_disable()
1812 sbr: in mlxsw_pci_reset_at_pci_disable()
|
| /linux/drivers/pci/ |
| H A D | pci.c | 4895 * Per CXL spec r3.1, sec 8.1.5.2, when "Unmask SBR" is 0, the SBR in cxl_sbr_masked()
4897 * hot reset when the SBR bit is set to 1. in cxl_sbr_masked()
4911 * If "dev" is below a CXL port that has SBR control masked, SBR in pci_reset_bus_function()
|
| /linux/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| H A D | amdgpu_smu.h | 1530 * @smu_handle_passthrough_sbr: Send message to SMU about special handling for SBR.
|
| /linux/drivers/acpi/ |
| H A D | scan.c | 1369 acpi_has_method(handle, "SBR") && in acpi_ibm_smbus_match()
|
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_device.c | 996 * Resets the GPU using generic pci reset interfaces (FLR, SBR, etc.).
2707 /* For passthrough configuration on arcturus and aldebaran, enable special handling SBR */ in amdgpu_device_ip_late_init()
|
| /linux/drivers/scsi/ |
| H A D | advansys.c | 2031 #define QHSTA_M_SCSI_BUS_RESET 0x30 /* Request aborted from SBR */
2032 #define QHSTA_M_SCSI_BUS_RESET_UNSOL 0x31 /* Request aborted from unsol. SBR */
|