Home
last modified time | relevance | path

Searched +full:sar2130p +full:- +full:gcc (Results 1 – 8 of 8) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sar2130p-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sar2130p-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on sar2130p
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
14 power domains on sar2130p.
16 See also: include/dt-bindings/clock/qcom,sar2130p-gcc.h
20 const: qcom,sar2130p-gcc
24 - description: XO reference clock
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsar2130p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sar2130p-gcc.h>
8 #include <dt-bindings/clock/qcom,sar2130p-gpucc.h>
9 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/interconnect/qcom,icc.h>
13 #include <dt-bindings/interconnect/qcom,sar2130p-rpmh.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <quic_wcheng@quicinc.com>
12 # Use the combined qcom,snps-dwc3 instead
21 - compatible
26 - enum:
27 - qcom,ipq4019-dwc3
28 - qcom,ipq5018-dwc3
29 - qcom,ipq5332-dwc3
[all …]
H A Dqcom,snps-dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <quic_wcheng@quicinc.com>
19 const: qcom,snps-dwc3
21 - compatible
26 - enum:
27 - qcom,ipq4019-dwc3
28 - qcom,ipq5018-dwc3
[all …]
/linux/Documentation/devicetree/bindings/nvmem/
H A Dqcom,qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 - $ref: nvmem.yaml#
14 - $ref: nvmem-deprecated-cells.yaml#
19 - enum:
20 - qcom,apq8064-qfprom
21 - qcom,apq8084-qfprom
22 - qcom,ipq5018-qfprom
[all …]
/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
20 - enum:
21 - qcom,sdhci-msm-v4
23 - items:
[all …]
/linux/drivers/clk/qcom/
H A Dgcc-sar2130p.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2021-2023, The Linux Foundation. All rights reserved.
7 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/qcom,sar2130p-gcc.h>
15 #include "clk-alpha-pll.h"
16 #include "clk-branch.h"
17 #include "clk-rcg.h"
18 #include "clk-regmap.h"
19 #include "clk-regmap-divider.h"
20 #include "clk-regmap-mux.h"
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-pcie.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
25 #include <dt-bindings/phy/phy-qcom-qmp.h>
27 #include "phy-qcom-qmp-common.h"
29 #include "phy-qcom-qmp.h"
30 #include "phy-qcom-qmp-pcs-misc-v3.h"
31 #include "phy-qcom-qmp-pcs-pcie-v4.h"
32 #include "phy-qcom-qmp-pcs-pcie-v4_20.h"
33 #include "phy-qcom-qmp-pcs-pcie-v5.h"
34 #include "phy-qcom-qmp-pcs-pcie-v5_20.h"
[all …]