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Searched +full:sar2130p +full:- +full:gcc (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sar2130p-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sar2130p-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on sar2130p
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
14 power domains on sar2130p.
16 See also: include/dt-bindings/clock/qcom,sar2130p-gcc.h
20 const: qcom,sar2130p-gcc
24 - description: XO reference clock
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/linux/Documentation/devicetree/bindings/nvmem/
H A Dqcom,qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 - $ref: nvmem.yaml#
14 - $ref: nvmem-deprecated-cells.yaml#
19 - enum:
20 - qcom,apq8064-qfprom
21 - qcom,apq8084-qfprom
22 - qcom,ipq5332-qfprom
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/linux/drivers/clk/qcom/
H A Dgcc-sar2130p.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2021-2023, The Linux Foundation. All rights reserved.
7 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/qcom,sar2130p-gcc.h>
15 #include "clk-alpha-pll.h"
16 #include "clk-branch.h"
17 #include "clk-rcg.h"
18 #include "clk-regmap.h"
19 #include "clk-regmap-divider.h"
20 #include "clk-regmap-mux.h"
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