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/linux/Documentation/devicetree/bindings/hwinfo/
H A Dsamsung,s5pv210-chipid.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/hwinfo/samsung,s5pv210-chipid.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S5PV210 SoC ChipID
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: samsung,s5pv210-chipid
20 - compatible
21 - reg
26 - |
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/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S5PV210 SoC device tree source
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
19 #include <dt-bindings/clock/s5pv210.h>
20 #include <dt-bindings/clock/s5pv210-audss.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
45 #address-cells = <1>;
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H A Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
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H A Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
46 bus_dmc: bus-dmc {
47 compatible = "samsung,exynos-bus";
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/linux/drivers/clk/samsung/
H A Dclk-s5pv210.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Common Clock Framework support for all S5PC110/S5PV210 SoCs.
11 #include <linux/clk-provider.h>
16 #include "clk-pll.h"
18 #include <dt-bindings/clock/s5pv210.h>
20 /* S5PC110/S5PV210 clock controller register offsets */
66 /* IDs of PLLs available on S5PV210/S5P6442 SoCs */
386 /* S5PV210-specific clock muxes. */
431 /* S5P6442-specific clock muxes. */
463 /* S5PV210-specific fixed rate clocks generated inside the SoC. */
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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