Searched +full:rzn1 +full:- +full:a5psw (Results 1 – 4 of 4) sorted by relevance
| /linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | renesas,rzn1-a5psw.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Clément Léger <clement.leger@bootlin.com>
17 - $ref: dsa.yaml#/$defs/ethernet-ports
22 - enum:
23 - renesas,r9a06g032-a5psw
24 - const: renesas,rzn1-a5psw
31 - description: Device Level Ring (DLR) interrupt
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| /linux/arch/arm/boot/dts/renesas/ |
| H A D | r9a06g032.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
30 compatible = "arm,cortex-a7";
33 enable-method = "renesas,r9a06g032-smp";
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| /linux/drivers/net/dsa/ |
| H A D | rzn1_a5psw.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #include <linux/pcs-rzn1-miic.h>
199 #define A5PSW_CPU_PORT (A5PSW_PORTS_NUM - 1)
209 #define A5PSW_MAX_MTU (A5PSW_JUMBO_LEN - A5PSW_EXTRA_MTU_LEN)
235 * struct a5psw - switch struct
246 * @reg_lock: Lock for register read-modify-write operation
250 struct a5psw { struct
256 struct phylink_pcs *pcs[A5PSW_PORTS_NUM - 1];
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| /linux/ |
| H A D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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