Searched +full:rzg2l +full:- +full:usbphy +full:- +full:ctrl (Results 1 – 7 of 7) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/reset/renesas,rzg2l-usbphy-ctrl.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Renesas RZ/{G2L,V2L} USBPHY Control10 - Biju Das <biju.das.jz@bp.renesas.com>13 The RZ/G2L USBPHY Control mainly controls reset and power down of the19 - items:20 - enum:21 - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Renesas RZ/G2L USBPHY control driver15 #include <linux/reset-controller.h>50 void __iomem *base = priv->base; in rzg2l_usbphy_ctrl_assert()54 spin_lock_irqsave(&priv->lock, flags); in rzg2l_usbphy_ctrl_assert()60 spin_unlock_irqrestore(&priv->lock, flags); in rzg2l_usbphy_ctrl_assert()69 void __iomem *base = priv->base; in rzg2l_usbphy_ctrl_deassert()73 spin_lock_irqsave(&priv->lock, flags); in rzg2l_usbphy_ctrl_deassert()79 spin_unlock_irqrestore(&priv->lock, flags); in rzg2l_usbphy_ctrl_deassert()92 return !!(readl(priv->base + RESET) & port_mask); in rzg2l_usbphy_ctrl_status()[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-y += core.o3 obj-y += amlogic/4 obj-y += hisilicon/5 obj-y += starfive/6 obj-y += sti/7 obj-y += tegra/8 obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o9 obj-$(CONFIG_RESET_ASPEED) += reset-aspeed.o10 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/clock/r9a07g043-cpg.h>12 #address-cells = <2>;13 #size-cells = <2>;15 audio_clk1: audio1-clk {16 compatible = "fixed-clock";17 #clock-cells = <0>;19 clock-frequency = <0>;22 audio_clk2: audio2-clk {23 compatible = "fixed-clock";[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a07g054-cpg.h>13 #address-cells = <2>;14 #size-cells = <2>;15 interrupt-parent = <&gic>;17 audio_clk1: audio1-clk {18 compatible = "fixed-clock";19 #clock-cells = <0>;21 clock-frequency = <0>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a07g044-cpg.h>13 #address-cells = <2>;14 #size-cells = <2>;15 interrupt-parent = <&gic>;17 audio_clk1: audio1-clk {18 compatible = "fixed-clock";19 #clock-cells = <0>;21 clock-frequency = <0>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a08g045-cpg.h>10 #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h>14 #address-cells = <2>;15 #size-cells = <2>;16 interrupt-parent = <&gic>;18 audio_clk1: audio1-clk {19 compatible = "fixed-clock";20 #clock-cells = <0>;[all …]