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/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2500usb.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
36 * Default offset is required for RSSI <-> dBm conversion.
238 * ACK_TIMEOUT: ACK Timeout in unit of 1-us.
248 * TXRX_CSR2: RX control.
249 * DISABLE_RX: Disable rx engine.
271 * RX BBP ID registers
272 * TXRX_CSR3: CCK RX BBP ID.
273 * TXRX_CSR4: OFDM RX BBP ID.
315 * TXRX_CSR9: TX ACK time-out.
[all …]
H A Drt73usb.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
27 * Default offset is required for RSSI <-> dBm conversion.
76 * 16 entries 32-byte for shared key table
77 * 64 entries 32-byte for pairwise key table
78 * 64 entries 8-byte for pairwise ta key table
113 * On-chip BEACON frame space.
159 * to determine the UNICAST_TO_ME bit for RX frames.
182 * when determining the MY_BSS of RX frames.
183 * 0: 1-BSSID mode (BSS index = 0)
[all …]
H A Drt61pci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
34 * Default offset is required for RSSI <-> dBm conversion.
121 * 16 entries 32-byte for shared key table
122 * 64 entries 32-byte for pairwise key table
123 * 64 entries 8-byte for pairwise ta key table
152 * Other on-chip shared memory space.
164 * On-chip BEACON frame space.
175 * HOST-MCU shared memory.
179 * H2M_MAILBOX_CSR: Host-to-MCU Mailbox.
[all …]
/linux/drivers/firmware/arm_scmi/
H A Dshmem.c1 // SPDX-License-Identifier: GPL-2.0
3 * For transport using shared mem structure.
5 * Copyright (C) 2019-2024 ARM Ltd.
67 * pre-processor.
98 * until it releases the shared memory, otherwise we may endup in shmem_tx_prepare()
99 * overwriting its response with new message payload or vice-versa. in shmem_tx_prepare()
101 * not to bail-out on intermittent issues where the platform is in shmem_tx_prepare()
104 * Note that after a timeout is detected we bail-out and carry on but in shmem_tx_prepare()
109 stop = ktime_add_ms(ktime_get(), 2 * cinfo->rx_timeout_ms); in shmem_tx_prepare()
110 spin_until_cond((ioread32(&shmem->channel_status) & in shmem_tx_prepare()
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/linux/Documentation/virt/kvm/
H A Dppc-pv.rst1 .. SPDX-License-Identifier: GPL-2.0
35 'hypercall-instructions'. This property contains at most 4 opcodes that make
43 r0 - volatile
53 r12 - volatile
56 Hypercall definitions are shared in generic code, so the same hypercall numbers
73 To enable communication between the hypervisor and guest there is a new shared
75 map this shared page using the KVM hypercall KVM_HC_PPC_MAP_MAGIC_PAGE.
80 applicable to the target. For now, we always map the page to -4096. This way we
84 ld rX, -4096(0)
133 - MSR_EE
[all …]
/linux/drivers/firmware/samsung/
H A Dexynos-acpm.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/firmware/samsung/exynos-acpm-protocol.h>
19 #include <linux/mailbox/exynos-message.h>
31 #include "exynos-acpm.h"
32 #include "exynos-acpm-pmic.h"
42 * struct acpm_shmem - shared memory configuration information.
56 * struct acpm_chan_shmem - descriptor of a shared memory channel.
60 * @rx_rear: rear pointer of APM RX queue (TX for AP).
61 * @rx_front: front pointer of APM RX queue (TX for AP).
62 * @rx_base: base address of APM RX queue (TX for AP).
[all …]
/linux/drivers/net/vmxnet3/
H A Dvmxnet3_ethtool.c4 * Copyright (C) 2008-2024, VMware, Inc. All Rights Reserved.
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 * Maintained by: pv-drivers@vmware.com
89 { "Rx Queue#", 0 },
90 { " LRO pkts rx", offsetof(struct UPT1_RxStats, LROPktsRxOK) },
91 { " LRO byte rx", offsetof(struct UPT1_RxStats, LROBytesRxOK) },
92 { " ucast pkts rx", offsetof(struct UPT1_RxStats, ucastPktsRxOK) },
93 { " ucast bytes rx", offsetof(struct UPT1_RxStats, ucastBytesRxOK) },
94 { " mcast pkts rx", offsetof(struct UPT1_RxStats, mcastPktsRxOK) },
95 { " mcast bytes rx", offsetof(struct UPT1_RxStats, mcastBytesRxOK) },
[all …]
H A Dvmxnet3_drv.c4 * Copyright (C) 2008-2024, VMware, Inc. All Rights Reserved.
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 * Maintained by: pv-drivers@vmware.com
81 for (i = 0; i < adapter->intr.num_intrs; i++) in vmxnet3_enable_all_intrs()
84 !adapter->queuesExtEnabled) { in vmxnet3_enable_all_intrs()
85 adapter->shared->devRead.intrConf.intrCtrl &= in vmxnet3_enable_all_intrs()
88 adapter->shared->devReadExt.intrConfExt.intrCtrl &= in vmxnet3_enable_all_intrs()
100 !adapter->queuesExtEnabled) { in vmxnet3_disable_all_intrs()
101 adapter->shared->devRead.intrConf.intrCtrl |= in vmxnet3_disable_all_intrs()
104 adapter->shared->devReadExt.intrConfExt.intrCtrl |= in vmxnet3_disable_all_intrs()
[all …]
/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Dice.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2018-2021 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Important Notes
16 - Additional Features & Configurations
17 - Performance Optimization
28 This driver supports XDP (Express Data Path) and AF_XDP zero-copy. Note that
43 -------------------------------------------
54 1) Make sure that your system's physical memory is in a high-performance
[all …]
/linux/Documentation/networking/
H A Dpktgen.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
31 overload type of benchmarking, as this could hurt the normal use-case.
35 # ethtool -G ethX tx 1024
44 ring-buffers for various performance reasons, and packets stalling
48 (Intel 82599 chip). This driver (ixgbe) combines TX+RX ring cleanups,
49 and the cleanup interval is affected by the ethtool --coalesce setting
50 of parameter "rx-usecs".
54 # ethtool -C ethX rx-usecs 30
72 * add_device DEVICE@NAME -- adds a single device
[all …]
H A Daf_xdp.rst1 .. SPDX-License-Identifier: GPL-2.0
20 XDP programs to redirect frames to a memory buffer in a user-space
24 syscall. Associated with each XSK are two rings: the RX ring and the
25 TX ring. A socket can receive packets on the RX ring and it can send
28 to have at least one of these rings for each socket. An RX or TX
30 UMEM. RX and TX can share the same UMEM so that a packet does not have
31 to be copied between RX and TX. Moreover, if a packet needs to be kept
44 to fill in with RX packet data. References to these frames will then
45 appear in the RX ring once each packet has been received. The
48 space, for either TX or RX. Thus, the frame addrs appearing in the
[all …]
H A Dmac80211-auth-assoc-deauth.txt14 userspace->mac80211: authenticate
17 mac80211->driver: sta_state(AP, not-exists)
18 mac80211->driver: bss_info_changed(clear BSSID)
26 mac80211->driver: config(channel, channel type)
27 mac80211->driver: bss_info_changed(set BSSID, basic rate bitmap)
28 mac80211->driver: sta_state(AP, exists)
31 mac80211->driver: TX directed probe request
32 driver->mac80211: RX probe response
35 mac80211->driver: TX auth frame
36 driver->mac80211: RX auth frame
[all …]
/linux/drivers/net/ethernet/dec/tulip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "DEC - Tulip devices"
70 bool "Use PCI shared mem for NIC registers"
73 Use PCI shared memory for the NIC registers, rather than going through
79 bool "Use RX polling (NAPI)"
86 If your estimated Rx load is 10kpps or more, or if the card will be
96 Use HW to reduce RX interrupts. Not strictly necessary since NAPI
97 reduces RX interrupts by itself. Interrupt mitigation reduces RX
114 the TX9882 chip on the Compex RL100-ATX board.
147 It should work with most DEC 21*4*-based chips/ethercards, as well
[all …]
/linux/include/linux/hsi/
H A Dhsi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
36 HSI_ARB_RR, /* Round-robin arbitration */
58 * struct hsi_channel - channel resource used by the hsi clients
68 * struct hsi_config - Configuration for RX/TX HSI modules
74 * @flow: RX flow type (SYNCHRONIZED or PIPELINE)
84 unsigned int flow; /* RX only */
90 * struct hsi_board_info - HSI client board info
95 * @rx_cfg: HSI RX configuration
97 * @archdata: Architecture-dependent device data
121 * struct hsi_client - HSI client attached to an HSI port
[all …]
/linux/Documentation/devicetree/bindings/mailbox/
H A Dbrcm,bcm74110-mbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/brcm,bcm74110-mbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Justin Chen <justin.chen@broadcom.com>
11 - Florian Fainelli <florian.fainelli@broadcom.com>
18 - brcm,bcm74110-mbox
25 - description: RX doorbell and watermark interrupts
26 - description: TX doorbell and watermark interrupts
28 "#mbox-cells":
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Ddra72-evm-revc.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
5 #include "dra72-evm-common.dtsi"
6 #include "dra72x-mmc-iodelay.dtsi"
7 #include <dt-bindings/net/ti-dp83867.h>
17 reserved-memory {
18 #address-cells = <2>;
19 #size-cells = <2>;
23 compatible = "shared-dma-pool";
30 compatible = "shared-dma-pool";
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2835-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 interrupt-parent = <&intc>;
11 dma: dma-controller@7e007000 {
12 compatible = "brcm,bcm2835-dma";
25 /* dma channel 11-14 share one irq */
30 /* unused shared irq for all channels */
32 interrupt-names = "dma0",
47 "dma-shared-all";
48 #dma-cells = <1>;
49 brcm,dma-channel-mask = <0x7f35>;
[all …]
/linux/drivers/net/ethernet/toshiba/
H A Dps3_gelic_net.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
64 /* RX descriptor data_status bits */
93 /* RX descriptor data error bits */
114 /* DMA command and status (RX and TX)*/
117 GELIC_DESCR_DMA_BUFFER_FULL = 0x00000000, /* used in rx */
118 GELIC_DESCR_DMA_RESPONSE_ERROR = 0x10000000, /* used in rx, tx */
119 GELIC_DESCR_DMA_PROTECTION_ERROR = 0x20000000, /* used in rx, tx */
120 GELIC_DESCR_DMA_FRAME_END = 0x40000000, /* used in rx */
121 GELIC_DESCR_DMA_FORCE_END = 0x50000000, /* used in rx, tx */
122 GELIC_DESCR_DMA_CARDOWNED = 0xa0000000, /* used in rx, tx */
[all …]
/linux/drivers/net/ethernet/3com/
H A Dtyphoon.c3 Written 2002-2004 by David Dillow <dave@thedillows.org>
4 Based on code written 1998-2000 by Donald Becker <becker@scyld.com> and
21 number Y1-LM-2015-01.
27 *) Cannot DMA Rx packets to a 2 byte aligned address. Also firmware
29 *) Waiting for a command response takes 8ms due to non-preemptable
36 *) Allow disabling of RX checksum offloading
40 *) Add in FCS to {rx,tx}_bytes, since the hardware doesn't. See
41 http://oss.sgi.com/cgi-bin/mesg.cgi?a=netdev&i=20031215152211.7003fe8e.rddunlap%40osdl.org
44 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
56 /* end user-configurable values */
[all …]
/linux/drivers/net/ethernet/marvell/
H A Dmv643xx_eth.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * Copyright (C) 2003 PMC-Sierra, Inc.,
13 * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
15 * Copyright (C) 2004-2006 MontaVista Software, Inc.
21 * Copyright (C) 2007-2008 Marvell Semiconductor
30 #include <linux/dma-mapping.h>
61 * Registers shared between all ports.
71 * Main per-port registers. These live at offset 0x0400 for
142 * Misc per-port registers.
173 #define SKB_DMA_REALIGN ((PAGE_SIZE - NET_SKB_PAD) % SMP_CACHE_BYTES)
[all …]
/linux/include/linux/
H A Dmv643xx_eth.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * MV-643XX ethernet platform device data definition file.
41 struct platform_device *shared; member
66 * How many RX/TX queues to use.
72 * Override default RX/TX queue sizes if nonzero.
78 * Use on-chip SRAM for RX/TX descriptors if size is nonzero
/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra186-bpmp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
32 - .../clock/clock-bindings.txt
33 - <dt-bindings/clock/tegra186-clock.h>
[all …]
/linux/Documentation/devicetree/bindings/dma/
H A Dk3dma.txt6 - compatible: Must be one of
7 - "hisilicon,k3-dma-1.0"
8 - "hisilicon,hisi-pcm-asp-dma-1.0"
9 - reg: Should contain DMA registers location and length.
10 - interrupts: Should contain one interrupt shared by all channel
11 - #dma-cells: see dma.txt, should be 1, para number
12 - dma-channels: physical channels supported
13 - dma-requests: virtual channels supported, each virtual channel
15 - clocks: clock required
21 compatible = "hisilicon,k3-dma-1.0";
[all …]
/linux/drivers/net/phy/
H A Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
129 * The value is calculated as following: (1/1000000)/((2^-32)/4)
135 * The value is calculated as following: (1/1000000)/((2^-32)/8)
394 /* Shared structure between the PHYs of the same package. */
420 /* Lock for Rx ts fifo */
560 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
564 if (type && type->interrupt_level_mask) in kszphy_config_intr()
565 mask = type->interrupt_level_mask; in kszphy_config_intr()
577 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in kszphy_config_intr()
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
[all …]

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