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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dqcom,wcd937x-sdw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd937x-sdw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9370/WCD9375 Codec is a standalone Hi-Fi audio codec IC.
14 It has RX and TX Soundwire slave devices. This bindings is for the
24 qcom,tx-port-mapping:
26 Specifies static port mapping between device and host tx ports.
27 In the order of the device port index which are adc1_port, adc23_port,
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H A Dqcom,wcd938x-sdw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd938x-sd
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H A Dqcom,wcd939x-sdw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd939x-sdw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9390/WCD9395 Codec is a standalone Hi-Fi audio codec IC.
14 It has RX and TX Soundwire devices. This bindings is for the devices.
23 qcom,tx-port-mapping:
25 Specifies static port mapping between device and host tx ports.
26 In the order of the device port index.
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H A Dqcom,wcd939x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9390/WCD9395 Codec is a standalone Hi-Fi audio codec IC.
14 It has RX and TX Soundwire devices.
15 The WCD9390/WCD9395 IC has a functionally separate USB-C Mux subsystem
17 The Audio Headphone and Microphone data path between the Codec and the USB-C Mux
18 subsystems are external to the IC, thus requiring DT port-endpoint graph description
19 to handle USB-C altmode & orientation switching for Audio Accessory Mode.
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H A Drockchip,i2s-tdm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
18 - $ref: dai-common.yaml#
23 - rockchip,px30-i2s-tdm
24 - rockchip,rk1808-i2s-tdm
25 - rockchip,rk3308-i2s-tdm
26 - rockchip,rk3568-i2s-tdm
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H A Dqcom,wcd938x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC.
14 It has RX and TX Soundwire slave devices.
17 - $ref: dai-common.yaml#
18 - $ref: qcom,wcd93xx-common.yaml#
23 - qcom,wcd9380-codec
24 - qcom,wcd9385-codec
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H A Dqcom,wcd937x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9370/WCD9375 Codec is a standalone Hi-Fi audio codec IC.
14 It has RX and TX Soundwire slave devices.
17 - $ref: dai-common.yaml#
18 - $ref: qcom,wcd93xx-common.yaml#
23 - const: qcom,wcd9370-codec
24 - items:
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/freebsd/sys/contrib/device-tree/Bindings/hsi/
H A Domap-ssi.txt9 - compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi"
10 - reg-names: Contains the values "sys" and "gdd" (in this order).
11 - reg: Contains a matching register specifier for each entry
12 in reg-names.
13 - interrupt-names: Contains the value "gdd_mpu".
14 - interrupts: Contains matching interrupt information for each entry
15 in interrupt-names.
16 - ranges: Represents the bus address mapping between the main
18 - clock-names: Must include the following entries:
22 - clocks: Contains a matching clock specifier for each entry in
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/freebsd/sys/contrib/xen/io/
H A Dnetif.h4 * Unified network-device I/O interface for Xen guest OSes.
24 * Copyright (c) 2003-2004, Keir Fraser
54 * If the client sends notification for rx requests then it should specify
55 * feature 'feature-rx-notify' via xenbus. Otherwise the backend will assume
60 * "feature-split-event-channels" is introduced to separate guest TX
61 * and RX notification. Backend either doesn't support this feature or
65 * channels for TX and RX, advertise them to backend as
66 * "event-channel-tx" and "event-channel-rx" respectively. If frontend
67 * doesn't want to use this feature, it just writes "event-channel"
73 * If supported, the backend will write the key "multi-queue-max-queues" to
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
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H A Dcavium-pip.txt10 - compatible: "cavium,octeon-3860-pip"
14 - reg: The base address of the PIP's register bank.
16 - #address-cells: Must be <1>.
18 - #size-cells: Must be <0>.
21 - compatible: "cavium,octeon-3860-pip-interface"
25 - reg: The interface number.
27 - #address-cells: Must be <1>.
29 - #size-cells: Must be <0>.
31 Properties for PIP port which is a child the PIP interface:
32 - compatible: "cavium,octeon-3860-pip-port"
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/freebsd/sys/contrib/device-tree/Bindings/iommu/
H A Dmediatek,iommu.txt5 pagetable, and only supports 4K size page mapping. Generation two uses the
6 ARM Short-Descriptor translation table format for address translation.
14 +--------+
16 gals0-rx gals1-rx (Global Async Local Sync rx)
19 gals0-tx gals1-tx (Global Async Local Sync tx)
21 +--------+
25 +----------------+-------
27 | gals-rx There may be GALS in some larbs.
30 | gals-tx
36 +-----+-----+ +----+----+
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H A Dmediatek,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsm8650-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 compatible = "qcom,sm8650-qrd", "qcom,sm8650";
30 stdout-path = "serial0:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
36 pinctrl-0 = <&volume_up_n>;
37 pinctrl-names = "default";
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H A Dsm8650-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
21 compatible = "qcom,sm8650-hdk", "qcom,sm8650";
22 chassis-type = "embedded";
30 stdout-path = "serial0:115200n8";
33 hdmi-out {
34 compatible = "hdmi-connector";
37 port {
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H A Dsm8550-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 compatible = "qcom,sm8550-hdk", "qcom,sm8550";
23 chassis-type = "embedded";
30 wcd938x: audio-codec {
31 compatible = "qcom,wcd9385-codec";
33 pinctrl-names = "default";
34 pinctrl-0 = <&wcd_default>;
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H A Dx1e80100-qcp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "x1e80100-pmics.dtsi"
16 compatible = "qcom,x1e80100-qcp", "qcom,x1e80100";
22 wcd938x: audio-codec {
23 compatible = "qcom,wcd9385-codec";
25 pinctrl-names = "default";
26 pinctrl-0 = <&wcd_default>;
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/freebsd/sys/contrib/device-tree/Bindings/ata/
H A Dqcom-sata.txt3 SATA nodes are defined to describe on-chip Serial ATA controllers.
7 - compatible : compatible list, must contain "generic-ahci"
8 - interrupts : <interrupt mapping for SATA IRQ>
9 - reg : <registers mapping>
10 - phys : Must contain exactly one entry as specified
11 in phy-bindings.txt
12 - phy-names : Must be "sata-phy"
14 Required properties for "qcom,ipq806x-ahci" compatible:
15 - clocks : Must contain an entry for each entry in clock-names.
16 - clock-names : Shall be:
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/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/dev/mana/
H A Dmana_sysctl.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
47 &mana_rx_req_size, 0, "requested number of unit of rx queue");
50 "number of rx slots before starting the refill");
70 for (i = 0; i < apc->num_queues; i++) { in mana_sysctl_rx_stat_agg_u64()
71 rxq = apc->rxqs[i]; in mana_sysctl_rx_stat_agg_u64()
76 if (err || req->newptr == NULL) in mana_sysctl_rx_stat_agg_u64()
79 for (i = 0; i < apc->num_queues; i++) { in mana_sysctl_rx_stat_agg_u64()
80 rxq = apc->rxqs[i]; in mana_sysctl_rx_stat_agg_u64()
95 rxq = apc->rxqs[0]; in mana_sysctl_rx_stat_u16()
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/freebsd/sys/dev/sfxge/common/
H A Def10_nic.c1 /*-
2 * Copyright (c) 2012-2016 Solarflare Communications Inc.
52 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON || in efx_mcdi_get_port_assignment()
53 enp->en_family == EFX_FAMILY_MEDFORD || in efx_mcdi_get_port_assignment()
54 enp->en_family == EFX_FAMILY_MEDFORD2); in efx_mcdi_get_port_assignment()
98 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON || in efx_mcdi_get_port_modes()
99 enp->en_family == EFX_FAMILY_MEDFORD || in efx_mcdi_get_port_modes()
100 enp->en_family == EFX_FAMILY_MEDFORD2); in efx_mcdi_get_port_modes()
161 efx_port_t *epp = &(enp->en_port); in ef10_nic_get_port_mode_bandwidth()
171 /* No port mode info available. */ in ef10_nic_get_port_mode_bandwidth()
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/freebsd/sys/contrib/ncsw/inc/flib/
H A Dfsl_fman_port.h2 * Copyright 2008-2013 Freescale Semiconductor Inc.
137 /** @Description General port defines */
148 /** @Collection FM Port Register Map */
150 /** @Description BMI Rx port register map */
152 uint32_t fmbm_rcfg; /**< Rx Configuration */
153 uint32_t fmbm_rst; /**< Rx Status */
154 uint32_t fmbm_rda; /**< Rx DMA attributes*/
155 uint32_t fmbm_rfp; /**< Rx FIFO Parameters*/
156 uint32_t fmbm_rfed; /**< Rx Frame End Data*/
157 uint32_t fmbm_ricp; /**< Rx Internal Context Parameters*/
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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dimx7-mipi-csi2.txt5 --------------
7 This is the device node for the MIPI CSI-2 receiver core in i.MX7 SoC. It is
8 compatible with previous version of Samsung D-phy.
12 - compatible : "fsl,imx7-mipi-csi2";
13 - reg : base address and length of the register set for the device;
14 - interrupts : should contain MIPI CSIS interrupt;
15 - clocks : list of clock specifiers, see
16 Documentation/devicetree/bindings/clock/clock-bindings.txt for details;
17 - clock-names : must contain "pclk", "wrap" and "phy" entries, matching
19 - power-domains : a phandle to the power domain, see
[all …]
/freebsd/sys/dev/ice/
H A Dice_lib.h1 /* SPDX-License-Identifier: BSD-3-Clause */
83 * for_each_set_bit - For loop over each set bit in a bit string
94 (bit) != -1; \
125 /* global sysctl indicating whether to enable 5-layer scheduler topology */
130 * @brief PCI BAR mapping information
145 /* Maximum TSO size is (256K)-1 */
146 #define ICE_TSO_SIZE ((256*1024) - 1)
154 #define ICE_MAX_DMA_SEG_SIZE ((16*1024) - 1)
179 /* List of known RX CSUM offload flags */
199 (ice_is_bit_set(sc->feat_en, ICE_FEATURE_SAFE_MODE) ? ICE_SAFE_CAPS : ICE_FULL_CAPS)
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/freebsd/sys/arm/ti/cpsw/
H A Dif_cpsw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
36 * and in the TMS320C6452 3 Port Switch Ethernet Subsystem TRM.
38 * It is basically a single Ethernet port (port 0) wired internally to
39 * a 3-port store-and-forward switch connected to two independent
40 * "sliver" controllers (port 1 and port 2). You can operate the
212 /* Port/Slave resources. */
252 { -1, 0 }
331 if ((_sc)->debug) { \
341 mtx_assert(&(sc)->rx.lock, MA_NOTOWNED); \
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