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/linux/drivers/rtc/
H A DMakefile3 # Makefile for RTC class/drivers.
9 obj-$(CONFIG_RTC_CLASS) += rtc-core.o
10 obj-$(CONFIG_RTC_MC146818_LIB) += rtc-mc146818-lib.o
11 rtc-core-y := class.o interface.o
13 rtc-core-$(CONFIG_RTC_NVMEM) += nvmem.o
14 rtc-core-$(CONFIG_RTC_INTF_DEV) += dev.o
15 rtc-core-$(CONFIG_RTC_INTF_PROC) += proc.o
16 rtc-core-$(CONFIG_RTC_INTF_SYSFS) += sysfs.o
22 obj-$(CONFIG_RTC_DRV_88PM80X) += rtc-88pm80x.o
23 obj-$(CONFIG_RTC_DRV_88PM860X) += rtc-88pm860x.o
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H A Drtc-ds1685.c3 * An rtc driver for the Dallas/Maxim DS1685/DS1687 and related real-time
13 * Application Note 90, Using the Multiplex Bus RTC Extended Features.
23 #include <linux/rtc.h>
26 #include <linux/rtc/ds1685.h>
40 * ds1685_read - read a value from an rtc register.
41 * @rtc: pointer to the ds1685 rtc structure.
45 ds1685_read(struct ds1685_priv *rtc, int reg) in ds1685_read() argument
47 return readb((u8 __iomem *)rtc->regs + in ds1685_read()
48 (reg * rtc->regstep)); in ds1685_read()
52 * ds1685_write - write a value to an rtc register.
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H A Dclass.c3 * RTC subsystem, base class
15 #include <linux/rtc.h>
21 #include "rtc-core.h"
27 struct rtc_device *rtc = to_rtc_device(dev); in rtc_device_release() local
28 struct timerqueue_head *head = &rtc->timerqueue; in rtc_device_release()
31 mutex_lock(&rtc->ops_lock); in rtc_device_release()
34 mutex_unlock(&rtc->ops_lock); in rtc_device_release()
36 cancel_work_sync(&rtc->irqwork); in rtc_device_release()
38 ida_free(&rtc_ida, rtc->id); in rtc_device_release()
39 mutex_destroy(&rtc->ops_lock); in rtc_device_release()
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H A Drtc-omap.c8 * Copyright (C) 2006 David Brownell (new RTC framework)
27 #include <linux/rtc.h>
28 #include <linux/rtc/rtc-omap.h>
31 * The OMAP RTC is a year/month/day/hours/minutes/seconds BCD clock
39 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
40 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
45 /* RTC registers */
137 void (*lock)(struct omap_rtc *rtc);
138 void (*unlock)(struct omap_rtc *rtc);
142 struct rtc_device *rtc; member
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H A Dinterface.c3 * RTC subsystem, interface functions
11 #include <linux/rtc.h>
18 #include <trace/events/rtc.h>
20 static int rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer);
21 static void rtc_timer_remove(struct rtc_device *rtc, struct rtc_timer *timer);
23 static void rtc_add_offset(struct rtc_device *rtc, struct rtc_time *tm) in rtc_add_offset() argument
27 if (!rtc->offset_secs) in rtc_add_offset()
33 * Since the reading time values from RTC device are always in the RTC in rtc_add_offset()
38 if ((rtc->start_secs > rtc->range_min && secs >= rtc->start_secs) || in rtc_add_offset()
39 (rtc->start_secs < rtc->range_min && in rtc_add_offset()
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H A DKconfig3 # RTC class/drivers configuration
19 Generic RTC class support. If you say yes here, you will
26 bool "Set system time from RTC on startup and resume"
30 the value read from a specified RTC device. This is useful to avoid
34 string "RTC used to set the system time"
38 The RTC device that will be used to (re)initialize the system
50 sleep states. Do not specify an RTC here unless it stays powered
54 bool "Set the RTC time based on NTP synchronization"
58 in the RTC specified by RTC_HCTOSYS_DEVICE approximately every 11
62 string "RTC used to synchronize NTP adjustment"
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H A Drtc-armada38x.c3 * RTC driver for the Armada 38x Marvell SoCs
15 #include <linux/rtc.h>
85 /* Initialize the RTC-MBUS bridge timing */
86 void (*update_mbus_timing)(struct armada38x_rtc *rtc);
87 u32 (*read_rtc_reg)(struct armada38x_rtc *rtc, u8 rtc_reg);
88 void (*clear_isr)(struct armada38x_rtc *rtc);
89 void (*unmask_interrupt)(struct armada38x_rtc *rtc);
95 * register write to the RTC hard macro so that the required update
97 * According to errata RES-3124064, Write to any RTC register
98 * may fail. As a workaround, before writing to RTC
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H A Drtc-lpc32xx.c11 #include <linux/rtc.h>
51 struct rtc_device *rtc; member
58 struct lpc32xx_rtc *rtc = dev_get_drvdata(dev); in lpc32xx_rtc_read_time() local
60 elapsed_sec = rtc_readl(rtc, LPC32XX_RTC_UCOUNT); in lpc32xx_rtc_read_time()
68 struct lpc32xx_rtc *rtc = dev_get_drvdata(dev); in lpc32xx_rtc_set_time() local
72 spin_lock_irq(&rtc->lock); in lpc32xx_rtc_set_time()
74 /* RTC must be disabled during count update */ in lpc32xx_rtc_set_time()
75 tmp = rtc_readl(rtc, LPC32XX_RTC_CTRL); in lpc32xx_rtc_set_time()
76 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp | LPC32XX_RTC_CTRL_CNTR_DIS); in lpc32xx_rtc_set_time()
77 rtc_writel(rtc, LPC32XX_RTC_UCOUNT, secs); in lpc32xx_rtc_set_time()
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H A Drtc-sh.c3 * SuperH On-Chip RTC Support
9 * Based on the old arch/sh/kernel/cpu/rtc.c by:
18 #include <linux/rtc.h>
29 #include <asm/rtc.h>
31 /* Default values for RZ/A RTC */
38 #define DRV_NAME "sh-rtc"
44 #define RSECCNT RTC_REG(1) /* RTC sec */
45 #define RMINCNT RTC_REG(2) /* RTC min */
46 #define RHRCNT RTC_REG(3) /* RTC hour */
47 #define RWKCNT RTC_REG(4) /* RTC week */
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H A Drtc-sc27xx.c14 #include <linux/rtc.h>
104 struct rtc_device *rtc; member
113 * The Spreadtrum RTC controller has 3 groups registers, including time, normal
114 * alarm and auxiliary alarm. The time group registers are used to set RTC time,
126 static int sprd_rtc_clear_alarm_ints(struct sprd_rtc *rtc) in sprd_rtc_clear_alarm_ints() argument
128 return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, in sprd_rtc_clear_alarm_ints()
132 static int sprd_rtc_lock_alarm(struct sprd_rtc *rtc, bool lock) in sprd_rtc_lock_alarm() argument
137 ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val); in sprd_rtc_lock_alarm()
147 ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_SPG_UPD, val); in sprd_rtc_lock_alarm()
152 ret = regmap_read_poll_timeout(rtc->regmap, in sprd_rtc_lock_alarm()
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H A Drtc-at91sam9.c7 * Based on rtc-at91rm9200.c by Rick Bronson
20 #include <linux/rtc.h>
38 * The RTC's value is the RTT counter plus that offset. The RTC's alarm
42 * choose from, or a "real" RTC module. All systems have multiple GPBR
43 * registers available, likewise usable for more than "RTC" support.
81 #define rtt_readl(rtc, field) \ argument
82 readl((rtc)->rtt + AT91_RTT_ ## field)
83 #define rtt_writel(rtc, field, val) \ argument
84 writel((val), (rtc)->rtt + AT91_RTT_ ## field)
86 static inline unsigned int gpbr_readl(struct sam9_rtc *rtc) in gpbr_readl() argument
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H A Drtc-lpc24xx.c3 * RTC driver for NXP LPC178x/18xx/43xx Real-Time Clock (RTC)
15 #include <linux/rtc.h>
17 /* LPC24xx RTC register offsets and bits */
63 struct rtc_device *rtc; member
70 struct lpc24xx_rtc *rtc = dev_get_drvdata(dev); in lpc24xx_rtc_set_time() local
72 /* Disable RTC during update */ in lpc24xx_rtc_set_time()
73 rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN); in lpc24xx_rtc_set_time()
75 rtc_writel(rtc, LPC24XX_SEC, tm->tm_sec); in lpc24xx_rtc_set_time()
76 rtc_writel(rtc, LPC24XX_MIN, tm->tm_min); in lpc24xx_rtc_set_time()
77 rtc_writel(rtc, LPC24XX_HOUR, tm->tm_hour); in lpc24xx_rtc_set_time()
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H A Drtc-meson.c3 * RTC driver for the interal RTC block in the Amlogic Meson6, Meson8,
6 * The RTC is split in to two parts, the AHB front end and a simple serial
25 #include <linux/rtc.h>
46 /* rtc registers accessed via rtc-serial interface */
62 struct rtc_device *rtc; /* rtc device we created */ member
79 /* RTC front-end serialiser controls */
81 static void meson_rtc_sclk_pulse(struct meson_rtc *rtc) in meson_rtc_sclk_pulse() argument
84 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK, 0); in meson_rtc_sclk_pulse()
86 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK, in meson_rtc_sclk_pulse()
90 static void meson_rtc_send_bit(struct meson_rtc *rtc, unsigned int bit) in meson_rtc_send_bit() argument
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H A Drtc-mpc5121.c12 #include <linux/rtc.h>
20 u8 set_time; /* RTC + 0x00 */
21 u8 hour_set; /* RTC + 0x01 */
22 u8 minute_set; /* RTC + 0x02 */
23 u8 second_set; /* RTC + 0x03 */
25 u8 set_date; /* RTC + 0x04 */
26 u8 month_set; /* RTC + 0x05 */
27 u8 weekday_set; /* RTC + 0x06 */
28 u8 date_set; /* RTC + 0x07 */
30 u8 write_sw; /* RTC + 0x08 */
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H A Drtc-st-lpc.c3 * rtc-st-lpc.c - ST's LPC RTC, powered by the Low Power Timer
23 #include <linux/rtc.h>
52 static void st_rtc_set_hw_alarm(struct st_rtc *rtc, in st_rtc_set_hw_alarm() argument
57 spin_lock_irqsave(&rtc->lock, flags); in st_rtc_set_hw_alarm()
59 writel_relaxed(1, rtc->ioaddr + LPC_WDT_OFF); in st_rtc_set_hw_alarm()
61 writel_relaxed(msb, rtc->ioaddr + LPC_LPA_MSB_OFF); in st_rtc_set_hw_alarm()
62 writel_relaxed(lsb, rtc->ioaddr + LPC_LPA_LSB_OFF); in st_rtc_set_hw_alarm()
63 writel_relaxed(1, rtc->ioaddr + LPC_LPA_START_OFF); in st_rtc_set_hw_alarm()
65 writel_relaxed(0, rtc->ioaddr + LPC_WDT_OFF); in st_rtc_set_hw_alarm()
67 spin_unlock_irqrestore(&rtc->lock, flags); in st_rtc_set_hw_alarm()
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H A Drtc-cpcap.c3 * Motorola CPCAP PMIC RTC driver
23 #include <linux/rtc.h>
51 static void cpcap2rtc_time(struct rtc_time *rtc, struct cpcap_time *cpcap) in cpcap2rtc_time() argument
59 rtc_time64_to_tm(time, rtc); in cpcap2rtc_time()
62 static void rtc2cpcap_time(struct cpcap_time *cpcap, struct rtc_time *rtc) in rtc2cpcap_time() argument
66 time = rtc_tm_to_time64(rtc); in rtc2cpcap_time()
76 struct cpcap_rtc *rtc = dev_get_drvdata(dev); in cpcap_rtc_alarm_irq_enable() local
78 if (rtc->alarm_enabled == enabled) in cpcap_rtc_alarm_irq_enable()
82 enable_irq(rtc->alarm_irq); in cpcap_rtc_alarm_irq_enable()
84 disable_irq(rtc->alarm_irq); in cpcap_rtc_alarm_irq_enable()
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H A Drtc-jz4740.c5 * JZ4740 SoC RTC driver
19 #include <linux/rtc.h>
64 struct rtc_device *rtc; member
73 static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg) in jz4740_rtc_reg_read() argument
75 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
78 static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc) in jz4740_rtc_wait_write_ready() argument
82 return readl_poll_timeout(rtc->base + JZ_REG_RTC_CTRL, ctrl, in jz4740_rtc_wait_write_ready()
86 static inline int jz4780_rtc_enable_write(struct jz4740_rtc *rtc) in jz4780_rtc_enable_write() argument
91 ret = jz4740_rtc_wait_write_ready(rtc); in jz4780_rtc_enable_write()
95 writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write()
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H A Drtc-mt6397.c15 #include <linux/rtc.h>
16 #include <linux/mfd/mt6397/rtc.h>
19 static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc) in mtk_rtc_write_trigger() argument
24 ret = regmap_write(rtc->regmap, rtc->addr_base + rtc->data->wrtgr, 1); in mtk_rtc_write_trigger()
28 ret = regmap_read_poll_timeout(rtc->regmap, in mtk_rtc_write_trigger()
29 rtc->addr_base + RTC_BBPU, data, in mtk_rtc_write_trigger()
34 dev_err(rtc->rtc_dev->dev.parent, in mtk_rtc_write_trigger()
42 struct mt6397_rtc *rtc = data; in mtk_rtc_irq_handler_thread() local
46 ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_STA, &irqsta); in mtk_rtc_irq_handler_thread()
48 rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF); in mtk_rtc_irq_handler_thread()
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H A Drtc-stm32.c23 #include <linux/rtc.h>
120 /* Max STM32 RTC register offset is 0x3FC */
123 /* STM32 RTC driver time helpers */
126 /* STM32 RTC pinctrl helpers */
157 void (*clear_events)(struct stm32_rtc *rtc, unsigned int flags);
187 static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc) in stm32_rtc_wpr_unlock() argument
189 const struct stm32_rtc_registers *regs = &rtc->data->regs; in stm32_rtc_wpr_unlock()
191 writel_relaxed(RTC_WPR_1ST_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
192 writel_relaxed(RTC_WPR_2ND_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
195 static void stm32_rtc_wpr_lock(struct stm32_rtc *rtc) in stm32_rtc_wpr_lock() argument
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H A Drtc-da9052.c12 #include <linux/rtc.h>
19 #define rtc_err(rtc, fmt, ...) \ argument
20 dev_err(rtc->da9052->dev, "%s: " fmt, __func__, ##__VA_ARGS__)
25 struct rtc_device *rtc; member
29 static int da9052_rtc_enable_alarm(struct da9052_rtc *rtc, bool enable) in da9052_rtc_enable_alarm() argument
33 ret = da9052_reg_update(rtc->da9052, DA9052_ALARM_Y_REG, in da9052_rtc_enable_alarm()
37 rtc_err(rtc, "Failed to enable ALM: %d\n", ret); in da9052_rtc_enable_alarm()
39 ret = da9052_reg_update(rtc->da9052, DA9052_ALARM_Y_REG, in da9052_rtc_enable_alarm()
42 rtc_err(rtc, "Write error: %d\n", ret); in da9052_rtc_enable_alarm()
49 struct da9052_rtc *rtc = data; in da9052_rtc_irq() local
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H A Drtc-ftrtc010.c10 * checkpatch fixes and usage of rtc-lib code
14 #include <linux/rtc.h>
23 #define DRV_NAME "rtc-ftrtc010"
26 MODULE_DESCRIPTION("RTC driver for Gemini SoC");
56 * Looks like the RTC in the Gemini SoC is (totaly) broken
57 * We can't read/write directly the time from RTC registers.
61 * the same thing, without the rtc-lib.c calls.
66 struct ftrtc010_rtc *rtc = dev_get_drvdata(dev); in ftrtc010_rtc_read_time() local
71 sec = readl(rtc->rtc_base + FTRTC010_RTC_SECOND); in ftrtc010_rtc_read_time()
72 min = readl(rtc->rtc_base + FTRTC010_RTC_MINUTE); in ftrtc010_rtc_read_time()
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H A Drtc-pcf50633.c2 /* NXP PCF50633 RTC Driver
18 #include <linux/rtc.h>
62 static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50633_time *pcf) in pcf2rtc_time() argument
64 rtc->tm_sec = bcd2bin(pcf->time[PCF50633_TI_SEC]); in pcf2rtc_time()
65 rtc->tm_min = bcd2bin(pcf->time[PCF50633_TI_MIN]); in pcf2rtc_time()
66 rtc->tm_hour = bcd2bin(pcf->time[PCF50633_TI_HOUR]); in pcf2rtc_time()
67 rtc->tm_wday = bcd2bin(pcf->time[PCF50633_TI_WKDAY]); in pcf2rtc_time()
68 rtc->tm_mday = bcd2bin(pcf->time[PCF50633_TI_DAY]); in pcf2rtc_time()
69 rtc->tm_mon = bcd2bin(pcf->time[PCF50633_TI_MONTH]) - 1; in pcf2rtc_time()
70 rtc->tm_year = bcd2bin(pcf->time[PCF50633_TI_YEAR]) + 100; in pcf2rtc_time()
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H A Drtc-pl030.c3 * linux/drivers/rtc/rtc-pl030.c
8 #include <linux/rtc.h>
24 struct rtc_device *rtc; member
30 struct pl030_rtc *rtc = dev_id; in pl030_interrupt() local
31 writel(0, rtc->base + RTC_EOI); in pl030_interrupt()
37 struct pl030_rtc *rtc = dev_get_drvdata(dev); in pl030_read_alarm() local
39 rtc_time64_to_tm(readl(rtc->base + RTC_MR), &alrm->time); in pl030_read_alarm()
45 struct pl030_rtc *rtc = dev_get_drvdata(dev); in pl030_set_alarm() local
47 writel(rtc_tm_to_time64(&alrm->time), rtc->base + RTC_MR); in pl030_set_alarm()
54 struct pl030_rtc *rtc = dev_get_drvdata(dev); in pl030_read_time() local
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H A Drtc-ma35d1.c3 * RTC driver for Nuvoton MA35D1
16 #include <linux/rtc.h>
18 /* MA35D1 RTC Control Registers */
72 struct ma35_rtc *rtc = (struct ma35_rtc *)data; in ma35d1_rtc_interrupt() local
75 rtc_irq = rtc_reg_read(rtc, MA35_REG_RTC_INTSTS); in ma35d1_rtc_interrupt()
78 rtc_reg_write(rtc, MA35_REG_RTC_INTSTS, RTC_INTSTS_ALMIF); in ma35d1_rtc_interrupt()
82 rtc_update_irq(rtc->rtcdev, 1, events); in ma35d1_rtc_interrupt()
87 static int ma35d1_rtc_init(struct ma35_rtc *rtc, u32 ms_timeout) in ma35d1_rtc_init() argument
92 if (rtc_reg_read(rtc, MA35_REG_RTC_INIT) & RTC_INIT_ACTIVE) in ma35d1_rtc_init()
95 rtc_reg_write(rtc, MA35_REG_RTC_INIT, RTC_INIT_MAGIC_CODE); in ma35d1_rtc_init()
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H A Drtc-digicolor.c15 #include <linux/rtc.h>
41 static int dc_rtc_cmds(struct dc_rtc *rtc, const u8 *cmds, int len) in dc_rtc_cmds() argument
48 rtc->regs + DC_RTC_CONTROL); in dc_rtc_cmds()
50 rtc->regs + DC_RTC_CONTROL, val, in dc_rtc_cmds()
59 static int dc_rtc_read(struct dc_rtc *rtc, unsigned long *val) in dc_rtc_read() argument
65 ret = dc_rtc_cmds(rtc, read_cmds, ARRAY_SIZE(read_cmds)); in dc_rtc_read()
69 reference = readl_relaxed(rtc->regs + DC_RTC_REFERENCE); in dc_rtc_read()
70 time1 = readl_relaxed(rtc->regs + DC_RTC_TIME); in dc_rtc_read()
73 time2 = readl_relaxed(rtc->regs + DC_RTC_TIME); in dc_rtc_read()
83 static int dc_rtc_write(struct dc_rtc *rtc, u32 val) in dc_rtc_write() argument
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