Searched full:rstgen (Results 1 – 6 of 6) sorted by relevance
67 resets = <&rstgen JH7100_RSTN_TEMP_SENSE>,68 <&rstgen JH7100_RSTN_TEMP_APB>;
15 Tegra's clocks, and setting their rates. It comprises CLKGEN and RSTGEN units.25 RSTGEN provides the registers needed to control resetting of each block in
59 resets = <&rstgen RST_I2C0>;72 resets = <&rstgen RST_I2C1>;85 resets = <&rstgen RST_I2C2>;98 resets = <&rstgen RST_I2C3>;501 rstgen: reset-controller@7030013000 { label517 resets = <&rstgen RST_UART0>;
31 rstgen: reset-controller@c00 {
54 resets = <&rstgen 109>;