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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom-stats.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom-stats.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. (QTI) Stats
10 - Maulik Shah <quic_mkshah@quicinc.com>
22 - qcom,rpmh-stats
23 - qcom,sdm845-rpmh-stats
24 - qcom,rpm-stats
25 # For older RPM firmware versions with fixed offset for the sleep stats
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H A Dqcom,rpm-master-stats.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpm-master-stats.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. (QTI) RPM Master Stats
10 - Konrad Dybcio <konradybcio@kernel.org>
13 The Qualcomm RPM (Resource Power Manager) architecture includes a concept
14 of "RPM Masters". They can be thought of as "the local gang leaders", usually
15 spanning a single subsystem (e.g. APSS, ADSP, CDSP). All of the RPM decisions
16 (particularly around entering hardware-driven low power modes: XO shutdown
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/linux/drivers/soc/qcom/
H A Dqcom_stats.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2011-2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022-2025, Qualcomm Innovation Center, Inc. All rights reserved.
100 u64 accumulated = stat->accumulated; in qcom_print_stats()
102 * If a subsystem is in sleep when reading the sleep stats adjust in qcom_print_stats()
105 if (stat->last_entered_at > stat->last_exited_at) in qcom_print_stats()
106 accumulated += arch_timer_read_counter() - stat->last_entered_at; in qcom_print_stats()
108 seq_printf(s, "Count: %u\n", stat->count); in qcom_print_stats()
109 seq_printf(s, "Last Entered At: %llu\n", stat->last_entered_at); in qcom_print_stats()
110 seq_printf(s, "Last Exited At: %llu\n", stat->last_exited_at); in qcom_print_stats()
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/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Dlmac_common.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Marvell CN10K RPM driver
14 * struct lmac - per lmac locks and properties
52 /* CGX & RPM has different feature set
60 * RPM DMAC_CTL0 0x4ff8
64 * defined hence CGX uses OVERFLOW bit in CMR_INT. RPM block supports
70 /* lmac offset is different is RPM */
76 /* RPM & CGX differs in number of Receive/transmit stats */
84 /* Incase of RPM get number of lmacs from RPMX_CMR_RX_LMACS[LMAC_EXIST]
92 /* Register Stats related functions */
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H A Drpm.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Marvell CN10K RPM driver
86 /* FEC stats */
H A Dcgx.c1 // SPDX-License-Identifier: GPL-2.0
24 #define DRV_NAME "Marvell-CGX-RPM"
89 return (cgx->pdev->device == PCI_DEVID_CN10K_RPM) || in is_dev_rpm()
90 (cgx->pdev->device == PCI_DEVID_CN10KB_RPM); in is_dev_rpm()
95 if (!cgx || lmac_id < 0 || lmac_id >= cgx->max_lmac_per_mac) in is_lmac_valid()
97 return test_bit(lmac_id, &cgx->lmac_bmap); in is_lmac_valid()
107 for_each_set_bit(tmp, &cgx->lmac_bmap, cgx->max_lmac_per_mac) { in get_sequence_id_of_lmac()
121 return ((struct cgx *)cgxd)->mac_ops; in get_mac_ops()
126 return ((struct cgx *)cgxd)->fifo_len; in cgx_get_fifo_len()
131 writeq(val, cgx->reg_base + (lmac << cgx->mac_ops->lmac_offset) + in cgx_write()
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,rpm-proc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,rpm-proc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Resource Power Manager (RPM) Processor/Subsystem
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
12 - Stephan Gerhold <stephan@gerhold.net>
15 Resource Power Manager (RPM) subsystem found in various Qualcomm platforms:
17 +--------------------------------------------+
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/linux/tools/perf/Documentation/
H A Dsecurity.txt6 https://www.kernel.org/doc/html/latest/admin-guide/perf-security.html
15 1. Download selinux-policy SRPM package (e.g. selinux-policy-3.14.4-48.fc31.src.rpm on FC31)
18 # rpm -Uhv selinux-policy-3.14.4-48.fc31.src.rpm
22 # rpmbuild -bp selinux-policy.spec
24 3. Place patch below at rpmbuild/BUILD/selinux-policy-b86eaaf4dbcf2d51dd4432df7185c0eaf3cbcc02
27 # patch -p1 < selinux-policy-perf-events-perfmon.patch
30 # cat selinux-policy-perf-events-perfmon.patch
31 diff -Nura a/policy/flask/access_vectors b/policy/flask/access_vectors
32 --- a/policy/flask/access_vectors 2020-02-04 18:19:53.000000000 +0300
33 +++ b/policy/flask/access_vectors 2020-02-28 23:37:25.000000000 +0300
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8226.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
10 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
11 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
12 #include <dt-bindings/clock/qcom,rpmcc.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
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H A Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
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H A Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
11 #include <dt-bindings/gpio/gpio.h>
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/linux/arch/arm64/boot/dts/qcom/
H A Dsm6125.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,dispcc-sm6125.h>
7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
16 interrupt-parent = <&intc>;
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H A Dsdm630.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
8 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
9 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
10 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/interconnect/qcom,sdm660.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/gpio/gpio.h>
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H A Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
8 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
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/linux/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dotx2_common.h1 /* SPDX-License-Identifier: GPL-2.0 */
159 /* Driver counted stats */
247 /* MSI-X */
255 /* Stats */
382 /* Stats which need to be accumulated in software because
409 struct cn10k_txsc_stats stats; member
429 struct cn10k_rxsc_stats stats; member
562 /* af_xdp zero-copy */
568 return (pdev->device == PCI_DEVID_OCTEONTX2_RVU_AFVF) || in is_otx2_lbkvf()
569 (pdev->device == PCI_DEVID_RVU_REP); in is_otx2_lbkvf()
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H A Dotx2_pf.c1 // SPDX-License-Identifier: GPL-2.0
62 if (pf->xdp_prog && new_mtu > MAX_XDP_MTU) { in otx2_change_mtu()
64 netdev->mtu); in otx2_change_mtu()
65 return -EINVAL; in otx2_change_mtu()
71 netdev->mtu, new_mtu); in otx2_change_mtu()
72 WRITE_ONCE(netdev->mtu, new_mtu); in otx2_change_mtu()
82 int irq, vfs = pf->total_vfs; in otx2_disable_flr_me_intr()
86 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFME0); in otx2_disable_flr_me_intr()
91 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFFLR0); in otx2_disable_flr_me_intr()
97 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
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/linux/drivers/net/ethernet/intel/igc/
H A Digc_main.c1 // SPDX-License-Identifier: GPL-2.0
33 static int debug = -1;
81 struct net_device *dev = adapter->netdev; in igc_reset()
82 struct igc_hw *hw = &adapter->hw; in igc_reset()
83 struct igc_fc_info *fc = &hw->fc; in igc_reset()
95 * - the full Rx FIFO size minus one full Tx plus one full Rx frame in igc_reset()
97 hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE); in igc_reset()
99 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */ in igc_reset()
100 fc->low_water = fc->high_water - 16; in igc_reset()
101 fc->pause_time = 0xFFFF; in igc_reset()
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/linux/drivers/net/ethernet/intel/igb/
H A Digb_main.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
56 "Copyright (c) 2007-2014 Intel Corporation.";
124 struct rtnl_link_stats64 *stats);
208 static int debug = -1;
253 /* igb_regdump - register printout routine */
260 switch (reginfo->ofs) { in igb_regdump()
310 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs)); in igb_regdump()
314 snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]"); in igb_regdump()
315 pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1], in igb_regdump()
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/linux/drivers/net/ethernet/sfc/siena/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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/linux/drivers/gpu/drm/i915/
H A Di915_pmu.c2 * SPDX-License-Identifier: MIT
4 * Copyright © 2017-2018 Intel Corporation
33 return container_of(event->pmu, struct i915_pmu, base); in event_to_pmu()
48 return engine_config_sample(event->attr.config); in engine_event_sample()
53 return (event->attr.config >> I915_PMU_CLASS_SHIFT) & 0xff; in engine_event_class()
58 return (event->attr.config >> I915_PMU_SAMPLE_BITS) & 0xff; in engine_event_instance()
95 return -1; in other_bit()
118 enable)) - 1); in config_mask()
122 enable)) - 1); in config_mask()
129 return is_engine_config(event->attr.config); in is_engine_event()
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/linux/drivers/gpu/drm/imagination/
H A Dpvr_rogue_fwif.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
42 /* String used in pvrdebug -h output */
44 "main,mts,cleanup,csw,bif,pm,rtd,spm,pow,hwr,hwp,rpm,dma,misc,debug"
140 /* Firmware per-DM HWR states */
155 /* DM was identified as over-running and causing HWR */
157 /* DM was innocently affected by another DM over-running which caused HWR */
270 /* Identify whether MC config is P-P or P-S */
274 /* per-os firmware shared data */
297 /* Firmware trace time-stamp field breakup */
303 /* Extra debug-info (16 bits) */
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/linux/drivers/scsi/aacraid/
H A Daacraid.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 * Copyright (c) 2000-2010 Adaptec, Inc.
10 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
11 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com)
34 /*------------------------------------------------------------------------------
36 *----------------------------------------------------------------------------*/
61 /* Bit definitions in IOA->Host Interrupt Register */
90 # define AAC_DRIVER_BRANCH "-custom"
95 #define AAC_NUM_IO_FIB (1024 - AAC_NUM_MGT_FIB)
105 /* Thor: 5 phys. buses: #0: empty, 1-4: 256 targets each */
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/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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/linux/Documentation/scsi/
H A DChangeLog.lpfc2 * Please read the associated RELEASE-NOTES file !!!
8 * Fixed build warning for 2.6.12-rc2 kernels: mempool_alloc now
19 * Removed FC_TRANSPORT_PATCHESxxx defines. They're in 2.6.12-rc1.
26 * Added PCI ID for LP10000-S.
31 * Zero-out response sense length in lpfc_scsi_prep_cmnd to prevent
33 - was causing spurious 0710 messages.
55 - stop using volatile. if you need special ordering use memory
57 - switch lpfc_sli_pcimem_bcopy to take void * arguments.
58 - remove typecast for constants - a U postfix marks them
60 - add a MAILBOX_CMD_SIZE macro, as most users of
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/linux/drivers/net/ethernet/broadcom/
H A Dbnx2.c3 * Copyright (c) 2004-2014 Broadcom Corporation
4 * Copyright (c) 2014-2015 QLogic Corporation
30 #include <linux/dma-mapping.h>
61 #define FW_MIPS_FILE_06 "bnx2/bnx2-mips-06-6.2.3.fw"
62 #define FW_RV2P_FILE_06 "bnx2/bnx2-rv2p-06-6.0.15.fw"
63 #define FW_MIPS_FILE_09 "bnx2/bnx2-mips-09-6.2.1b.fw"
64 #define FW_RV2P_FILE_09_Ax "bnx2/bnx2-rv2p-09ax-6.0.17.fw"
65 #define FW_RV2P_FILE_09 "bnx2/bnx2-rv2p-09-6.0.17.fw"
104 { "Broadcom NetXtreme II BCM5706 1000Base-T" },
107 { "Broadcom NetXtreme II BCM5706 1000Base-SX" },
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