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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,glink-rpm-edge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,glink-rpm-edge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm G-Link RPM edge
10 Qualcomm G-Link edge, a FIFO based mechanism for communication with Resource
11 Power Manager (RPM) on various Qualcomm platforms.
14 - Bjorn Andersson <andersson@kernel.org>
18 const: qcom,glink-rpm
30 - description: rpm_hlos mailbox in APCS
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H A Dqcom,rpm-proc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,rpm-proc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Resource Power Manager (RPM) Processor/Subsystem
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
12 - Stephan Gerhold <stephan@gerhold.net>
15 Resource Power Manager (RPM) subsystem found in various Qualcomm platforms:
17 +--------------------------------------------+
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/linux/drivers/interconnect/qcom/
H A Dicc-rpm.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <linux/soc/qcom/smd-rpm.h>
11 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
13 #include <linux/interconnect-provider.h>
29 * struct rpm_clk_resource - RPM bus clock resource
30 * @resource_type: RPM resource type of the clock resource
41 * struct qcom_icc_provider - Qualcomm specific interconnect provider
47 * @ab_coeff: a percentage-based coefficient for compensating the AB calculations
48 * @ib_coeff: an inverse-percentage-based coefficient for compensating the IB calculations
51 * @bus_clk: a pointer to a HLOS-owned bus clock
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H A Dicc-rpm.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/interconnect-provider.h>
16 #include "icc-common.h"
17 #include "icc-rpm.h"
55 struct icc_provider *provider = src->provider; in qcom_icc_set_qnoc_qos()
57 struct qcom_icc_node *qn = src->data; in qcom_icc_set_qnoc_qos()
58 struct qcom_icc_qos *qos = &qn->qos; in qcom_icc_set_qnoc_qos()
61 rc = regmap_update_bits(qp->regmap, in qcom_icc_set_qnoc_qos()
62 qp->qos_offset + QNOC_QOS_MCTL_LOWn_ADDR(qos->qos_port), in qcom_icc_set_qnoc_qos()
64 qos->areq_prio << QNOC_QOS_MCTL_DFLT_PRIO_SHIFT); in qcom_icc_set_qnoc_qos()
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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,smd.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18 Using the top-level SMD node is deprecated. Instead, the SMD edges are defined
29 "^smd-edge|rpm$":
30 $ref: /schemas/remoteproc/qcom,smd-edge.yaml#
34 processor of some sort - or in SMD language an "edge". The name of the
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H A Dqcom,smd-rpm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,smd-rpm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Resource Power Manager (RPM) over SMD/GLINK
10 This driver is used to interface with the Resource Power Manager (RPM) found
11 in various Qualcomm platforms. The RPM allows each component in the system
15 The SMD or GLINK information for the RPM edge should be filled out. See
17 properties will reside within the RPM node itself.
19 The RPM exposes resources to its subnodes. The rpm_requests node must be
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/linux/drivers/gpu/drm/i915/gt/uc/
H A Dselftest_guc.c1 // SPDX-License-Identifier: MIT
18 err = -ETIMEDOUT; in request_add_spin()
34 ret = i915_sw_fence_await_dma_fence(&rq->submit, in nop_user_request()
35 &from->fence, 0, in nop_user_request()
62 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in intel_guc_scrub_ctbs()
65 /* Submit requests and inject errors forcing G2H to be dropped */ in intel_guc_scrub_ctbs()
76 ce->drop_schedule_enable = true; in intel_guc_scrub_ctbs()
79 ce->drop_schedule_disable = true; in intel_guc_scrub_ctbs()
82 ce->drop_deregister = true; in intel_guc_scrub_ctbs()
113 intel_gt_handle_error(engine->gt, -1, 0, "selftest reset"); in intel_guc_scrub_ctbs()
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H A Dintel_gsc_uc.c1 // SPDX-License-Identifier: MIT
24 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in gsc_work()
26 spin_lock_irq(gt->irq_lock); in gsc_work()
27 actions = gsc->gsc_work_actions; in gsc_work()
28 gsc->gsc_work_actions = 0; in gsc_work()
29 spin_unlock_irq(gt->irq_lock); in gsc_work()
36 else if (ret != -EEXIST) in gsc_work()
43 * Since this worker also handles proxy requests, we can't in gsc_work()
53 if (intel_uc_uses_huc(&gt->uc) && in gsc_work()
54 intel_huc_is_authenticated(&gt->uc.huc, INTEL_HUC_AUTH_BY_GUC)) in gsc_work()
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H A Dintel_gsc_fw.c1 // SPDX-License-Identifier: MIT
31 wakeref = intel_runtime_pm_get(uncore->rpm); in gsc_uc_get_fw_status()
36 intel_runtime_pm_put(uncore->rpm, wakeref); in gsc_uc_get_fw_status()
43 gsc_uc_get_fw_status(gsc_uc_to_gt(gsc)->uncore, in intel_gsc_uc_fw_proxy_init_done()
51 return -ENODEV; in intel_gsc_uc_fw_proxy_get_status()
52 if (!intel_uc_fw_is_loadable(&gsc->fw)) in intel_gsc_uc_fw_proxy_get_status()
53 return -ENODEV; in intel_gsc_uc_fw_proxy_get_status()
54 if (__intel_uc_fw_status(&gsc->fw) == INTEL_UC_FIRMWARE_LOAD_FAIL) in intel_gsc_uc_fw_proxy_get_status()
55 return -ENOLINK; in intel_gsc_uc_fw_proxy_get_status()
57 return -EAGAIN; in intel_gsc_uc_fw_proxy_get_status()
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/linux/drivers/soc/qcom/
H A Dsmd-rpm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
15 #include <linux/soc/qcom/smd-rpm.h>
20 * struct qcom_smd_rpm - state of the rpm device driver
22 * @dev: rpm device
25 * @ack_status: result of the rpm request
37 * struct qcom_rpm_header - header for all rpm requests and responses
47 * struct qcom_rpm_request - request message to the rpm
63 * struct qcom_rpm_message - response message from the rpm
67 * @message: textual message from the rpm
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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,rpm-common.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,rpm-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
10 - Konrad Dybcio <konradybcio@kernel.org>
13 RPM interconnect providers support for managing system bandwidth requirements
14 through manual requests based on either predefined values or as indicated by
19 '#interconnect-cells':
21 - const: 2
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/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_reset.c1 // SPDX-License-Identifier: MIT
22 struct i915_ggtt *ggtt = gt->ggtt; in __igt_reset_stolen()
23 const struct resource *dsm = &gt->i915->dsm.stolen; in __igt_reset_stolen()
34 if (!drm_mm_node_allocated(&ggtt->error_capture)) in __igt_reset_stolen()
43 return -ENOMEM; in __igt_reset_stolen()
47 err = -ENOMEM; in __igt_reset_stolen()
52 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in __igt_reset_stolen()
62 if (!(mask & engine->mask)) in __igt_reset_stolen()
83 dma_addr_t dma = (dma_addr_t)dsm->start + (page << PAGE_SHIFT); in __igt_reset_stolen()
87 ggtt->vm.insert_page(&ggtt->vm, dma, in __igt_reset_stolen()
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H A Dintel_reset.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2008-2018 Intel Corporation
41 struct drm_i915_file_private *file_priv = ctx->file_priv; in client_mark_guilty()
52 prev_hang = xchg(&file_priv->hang_timestamp, jiffies); in client_mark_guilty()
57 atomic_add(score, &file_priv->ban_score); in client_mark_guilty()
59 drm_dbg(&ctx->i915->drm, in client_mark_guilty()
61 ctx->name, score, in client_mark_guilty()
62 atomic_read(&file_priv->ban_score)); in client_mark_guilty()
73 if (intel_context_is_closed(rq->context)) in mark_guilty()
77 ctx = rcu_dereference(rq->context->gem_context); in mark_guilty()
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H A Dintel_gt_pm.c1 // SPDX-License-Identifier: MIT
30 int count = atomic_read(&gt->user_wakeref); in user_forcewake()
39 GEM_BUG_ON(count > atomic_read(&gt->wakeref.count)); in user_forcewake()
40 atomic_sub(count, &gt->wakeref.count); in user_forcewake()
42 atomic_add(count, &gt->wakeref.count); in user_forcewake()
50 write_seqcount_begin(&gt->stats.lock); in runtime_begin()
51 gt->stats.start = ktime_get(); in runtime_begin()
52 gt->stats.active = true; in runtime_begin()
53 write_seqcount_end(&gt->stats.lock); in runtime_begin()
60 write_seqcount_begin(&gt->stats.lock); in runtime_end()
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/linux/drivers/gpu/drm/i915/
H A Dintel_pcode.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2013-2021 Intel Corporation
16 return -ENODEV; in gen6_check_mailbox_status()
18 return -ENXIO; in gen6_check_mailbox_status()
21 return -EOVERFLOW; in gen6_check_mailbox_status()
23 return -ETIMEDOUT; in gen6_check_mailbox_status()
36 return -ENXIO; in gen7_check_mailbox_status()
38 return -ETIMEDOUT; in gen7_check_mailbox_status()
40 return -EINVAL; in gen7_check_mailbox_status()
42 return -ENXIO; in gen7_check_mailbox_status()
[all …]
H A Di915_driver.c1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
120 * requests (and thus managing bo) once the task has been completed in i915_workqueues_init()
122 * need high-priority retirement, such as waiting for an explicit in i915_workqueues_init()
125 * It is also used for periodic low-priority events, such as in i915_workqueues_init()
126 * idle-timers and recording error state. in i915_workqueues_init()
132 dev_priv->wq = alloc_ordered_workqueue("i915", 0); in i915_workqueues_init()
133 if (dev_priv->wq == NULL) in i915_workqueues_init()
136 dev_priv->display.hotplug.dp_wq = alloc_ordered_workqueue("i915-dp", 0); in i915_workqueues_init()
137 if (dev_priv->display.hotplug.dp_wq == NULL) in i915_workqueues_init()
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
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H A Dqcom-msm8226.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
15 #include <dt-bindings/thermal/thermal.h>
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H A Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
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/linux/arch/arm64/boot/dts/qcom/
H A Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
12 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&intc>;
20 sleep_clk: sleep-clk {
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H A Dqcm2290.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
10 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/interconnect/qcom,qcm2290.h>
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H A Dmsm8976.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno
9 #include <dt-bindings/clock/qcom,gcc-msm8976.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
17 interrupt-parent = <&intc>;
18 #address-cells = <2>;
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/linux/arch/um/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 menu "UML-specific options"
127 Add /lib (and /lib64 for 64-bit) to the linux binary's rpath
138 While the User-Mode Linux port uses its own root file system for
144 mount none /tmp/fromhost -t hostfs -o /tmp/umlshare
151 <http://user-mode-linux.sourceforge.net/hostfs.html>.
161 The user mode linux management console is a low-level interface to
163 a full-blown operating system running under every user mode linux
169 2.4.5-9um and later (path /tools/mconsole), and is also in the
170 distribution RPM package in 2.4.6 and later.
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/linux/Documentation/filesystems/caching/
H A Dcachefiles.rst1 .. SPDX-License-Identifier: GPL-2.0
31 (*) On-demand Read.
40 CacheFiles uses a userspace daemon to do some of the cache management - such as
49 CacheFiles creates a misc character device - "/dev/cachefiles" - that is used
58 space if necessary - see the "Cache Culling" section. This means it can be
71 - dnotify.
73 - extended attributes (xattrs).
75 - openat() and friends.
77 - bmap() support on files in the filesystem (FIBMAP ioctl).
79 - The use of bmap() to detect a partial page at the end of the file.
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/linux/drivers/hwmon/
H A Dcorsair-cpro.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * corsair-cpro.c - Linux driver for Corsair Commander Pro
33 #define CTL_GET_FW_VER 0x02 /* returns the firmware version in bytes 1-3 */
34 #define CTL_GET_BL_VER 0x06 /* returns the bootloader version in bytes 1-2 */
36 * returns in bytes 1-4 for each temp sensor:
42 * rcv: returns temp for channel in centi-degree celsius
52 * returns in bytes 1-6 for each fan:
59 * rcv: returns rpm in bytes 1,2
70 * send: byte 2 is percentage from 0 - 100
73 * set target rpm
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