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/linux/Documentation/devicetree/bindings/leds/backlight/
H A Dlp855x-backlight.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/lp855x-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Artur Weber <aweber.kernel@gmail.com>
15 - ti,lp8550
16 - ti,lp8551
17 - ti,lp8552
18 - ti,lp8553
19 - ti,lp8555
[all …]
/linux/drivers/comedi/drivers/
H A Dplx9080.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * plx9080.h
18 #include <linux/compiler.h>
19 #include <linux/types.h>
20 #include <linux/bitops.h>
21 #include <linux/delay.h>
22 #include <linux/errno.h>
23 #include <linux/io.h>
26 * struct plx_dma_desc - DMA descriptor format for PLX PCI 9080
32 * Describes the format of a scatter-gather DMA descriptor for the PLX
[all …]
/linux/arch/sh/include/mach-dreamcast/mach/
H A Dsysasic.h1 /* SPDX-License-Identifier: GPL-2.0
3 * include/asm-sh/dreamcast/sysasic.h
8 * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
15 #include <asm/irq.h>
17 /* Hardware events -
30 #define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */
32 #define HW_EVENT_PVR2_DMA (HW_EVENT_IRQ_BASE + 19) /* PVR2 DMA complete */
35 #define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */
36 #define HW_EVENT_AICA_SYS (HW_EVENT_IRQ_BASE + 33) /* AICA-related */
41 /* arch/sh/boards/mach-dreamcast/irq.c */
/linux/Documentation/admin-guide/
H A Ddevices.txt1 0 Unnamed devices (e.g. non-device mounts)
7 2 = /dev/kmem OBSOLETE - replaced by /proc/kcore
11 6 = /dev/core OBSOLETE - replaced by /proc/kcore
18 12 = /dev/oldmem OBSOLETE - replaced by /proc/vmcore
31 2 char Pseudo-TTY masters
37 Pseudo-tty's are named as follows:
40 the 1st through 16th series of 16 pseudo-ttys each, and
44 These are the old-style (BSD) PTY devices; Unix98
99 NOTE: The letter in the device name (d, q, h or u)
101 5.25" Quad Density (q), 5.25" High Density (h) or 3.5"
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/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g4.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include <linux/bitops.h>
6 #include <linux/init.h>
7 #include <linux/io.h>
8 #include <linux/kernel.h>
9 #include <linux/mutex.h>
10 #include <linux/of.h>
11 #include <linux/platform_device.h>
12 #include <linux/pinctrl/pinctrl.h>
13 #include <linux/pinctrl/pinmux.h>
[all …]
/linux/Documentation/admin-guide/media/
H A Dsiano-cardlist.rst1 .. SPDX-License-Identifier: GPL-2.0
8 .. flat-table::
9 :header-rows: 1
11 :stub-columns: 0
13 * - Card name
14 - USB IDs
15 * - Hauppauge Catamount
16 - 2040:1700
17 * - Hauppauge Okemo-A
18 - 2040:1800
[all …]
/linux/drivers/w1/
H A Dw1_io.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <asm/io.h>
8 #include <linux/delay.h>
9 #include <linux/moduleparam.h>
10 #include <linux/module.h>
12 #include "w1_internal.h"
31 175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82, 176, 238,
48 * w1_touch_bit() - Generates a write-0 or write-1 cycle and samples the level.
50 * @bit: 0 - write a 0, 1 - write a 0 read the level
54 if (dev->bus_master->touch_bit) in w1_touch_bit()
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/linux/net/netrom/
H A Daf_netrom.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/module.h>
9 #include <linux/moduleparam.h>
10 #include <linux/capability.h>
11 #include <linux/errno.h>
12 #include <linux/types.h>
13 #include <linux/socket.h>
14 #include <linux/in.h>
15 #include <linux/slab.h>
16 #include <linux/kernel.h>
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/linux/sound/soc/sof/intel/
H A Dhda-loader-skl.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
6 // Copyright(c) 2018-2022 Intel Corporation
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/firmware.h>
13 #include <linux/fs.h>
14 #include <linux/interrupt.h>
15 #include <linux/mm.h>
16 #include <linux/module.h>
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/linux/drivers/net/ethernet/alacritech/
H A Dslic.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <linux/types.h>
7 #include <linux/netdevice.h>
8 #include <linux/spinlock_types.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/pci.h>
11 #include <linux/list.h>
12 #include <linux/u64_stats_sync.h>
133 * 31-8 - phy addr of set of contiguous hdr buffers
134 * 7-0 - number of buffers passed
[all …]
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_gsc_binary_headers.h1 /* SPDX-License-Identifier: MIT */
9 #include <linux/types.h>
26 /* size of pointers layout not including ROM bypass vector */
31 * bits1-15: reserved
66 * Bits 0-15: BPDT entry type
67 * Bits 16-17: reserved
68 * Bit 18: code sub-partition
69 * Bits 19-31: reserved
97 * Bits 0-24: offset from the beginning of the code partition
99 * Bits 26-31: reserved
[all …]
/linux/arch/powerpc/sysdev/
H A Dcpm2_pic.c9 * 1999-2001 (c) Dan Malek <dan@embeddedalley.com>
19 * There are two 32-bit registers (high/low) for up to 64
29 #include <linux/stddef.h>
30 #include <linux/sched.h>
31 #include <linux/signal.h>
32 #include <linux/irq.h>
33 #include <linux/irqdomain.h>
35 #include <asm/immap_cpm2.h>
36 #include <asm/io.h>
38 #include "cpm2_pic.h"
[all …]
/linux/drivers/firewire/
H A Dcore-card.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2005-2007 Kristian Hoegsberg <krh@bitplanet.net>
6 #include <linux/bug.h>
7 #include <linux/completion.h>
8 #include <linux/crc-itu-t.h>
9 #include <linux/device.h>
10 #include <linux/errno.h>
11 #include <linux/firewire.h>
12 #include <linux/firewire-constants.h>
13 #include <linux/jiffies.h>
[all …]
/linux/arch/mips/alchemy/common/
H A Dsleeper.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 #include <asm/asm.h>
10 #include <asm/mipsregs.h>
11 #include <asm/regdef.h>
12 #include <asm/stackframe.h>
35 sw $19, PT_R19(sp)
60 /* Now set up the scratch registers so the boot rom will
133 /* wait for sdram to enter self-refresh mode */
206 /* wait for sdram to enter self-refresh mode */
240 * the write-only Config[OD] bit and set it back to one...
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/linux/arch/arm/include/asm/
H A Dcp15.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm/barrier.h>
14 #define CR_P (1 << 4) /* 32-bit exception handler */
15 #define CR_D (1 << 5) /* 32-bit data address range */
19 #define CR_R (1 << 9) /* ROM MMU protection */
33 #define CR_ST (1 << 19)
53 #include <asm/vdso/cp15.h>
55 extern unsigned long cr_alignment; /* defined in entry-armv.S */
109 * read-only) is fine for most cases and saves quite some #ifdeffery.
/linux/arch/m68k/include/uapi/asm/
H A Dbootinfo-mac.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 ** asm/bootinfo-mac.h -- Macintosh-specific boot information definitions
11 * Macintosh-specific tags (all __be32)
25 #define BI_MAC_ROMBASE 0x800b /* Mac system ROM base address */
29 * Macintosh hardware profile data - unused, see macintosh.h for
64 #define MAC_MODEL_LC 19
/linux/drivers/bus/
H A Domap_l3_smx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 /* Register definitions. All 64-bit wide */
46 #define L3_STATUS_0_DMARDIA_RSP (shift << 19)
140 OMAP_L3_IA_IVA_SS_DMA_1 = 19,
177 /* codes 9 - 15 are also reserved */
267 /* OCM ROM TA */
317 * <asm/io.h> at some point
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210-p2371-2180.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra210-p2180.dtsi"
5 #include "tegra210-p2597.dtsi"
9 compatible = "nvidia,p2371-2180", "nvidia,tegra210";
14 hvddio-pex-supply = <&vdd_1v8>;
15 dvddio-pex-supply = <&vdd_pex_1v05>;
16 vddio-pex-ctl-supply = <&vdd_1v8>;
19 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
20 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
[all …]
/linux/arch/arm/mach-footbridge/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-footbridge/common.c
5 * Copyright (C) 1998-2000 Russell King, Dave Gilbert.
7 #include <linux/module.h>
8 #include <linux/types.h>
9 #include <linux/mm.h>
10 #include <linux/ioport.h>
11 #include <linux/list.h>
12 #include <linux/init.h>
13 #include <linux/io.h>
[all …]
/linux/drivers/clk/meson/
H A Da1-pll.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <linux/clk-provider.h>
11 #include <linux/mod_devicetable.h>
12 #include <linux/platform_device.h>
13 #include "a1-pll.h"
14 #include "clk-regmap.h"
15 #include "meson-clkc-utils.h"
17 #include <dt-bindings/clock/amlogic,a1-pll-clkc.h>
39 .width = 19,
110 .width = 19,
[all …]
/linux/arch/arm/mach-pxa/
H A Dpxa3xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/pxa3xx.c
9 * 2007-09-02: eric miao <eric.miao@marvell.com>
12 #include <linux/dmaengine.h>
13 #include <linux/dma/pxa-dma.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/gpio-pxa.h>
18 #include <linux/pm.h>
[all …]
/linux/drivers/net/wireless/broadcom/brcm80211/include/
H A Dchipcommon.h1 // SPDX-License-Identifier: ISC
9 #include "defs.h" /* for PAD macro */
49 /* gpio - cleared only by power-on-reset */
234 #define CC_CAP_MIPSEB 0x00000004 /* MIPS is in big-endian mode */
247 #define CC_CAP_OTPSIZE_SHIFT 19 /* OTP Size shift */
250 #define CC_CAP_ROM 0x00800000 /* Internal boot rom active */
251 #define CC_CAP_BKPLN64 0x08000000 /* 64-bit backplane */
273 #define CC_SR_CTL0_EN_SR_HT_CLK_SHIFT 19
/linux/drivers/net/wireless/ath/ath10k/
H A Dtargaddrs.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2016 Qualcomm Atheros, Inc.
10 #include "hw.h"
36 * Pointer to application-defined area, if any.
50 * General-purpose flag bits, similar to SOC_OPTION_* flags.
103 u32 hi_num_bpatch_streams; /* 0x70 -- unused */
124 * 0xa8 - [1]: 0 = UART FC active low, 1 = UART FC active high
137 * preserve host Interest area, or preserve ROM data, literals etc.
143 /* 0xbc - [31:0]: idle timeout in ms */
[all …]
/linux/arch/arm/boot/dts/arm/
H A Darm-realview-pb1176.dts23 /dts-v1/;
24 #include <dt-bindings/interrupt-controller/irq.h>
25 #include <dt-bindings/gpio/gpio.h>
28 #address-cells = <1>;
29 #size-cells = <1>;
31 compatible = "arm,realview-pb1176";
50 vmmc: regulator-vmmc {
51 compatible = "regulator-fixed";
52 regulator-name = "vmmc";
53 regulator-min-microvolt = <3300000>;
[all …]
/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_minidump.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2009-2013 QLogic Corporation
7 #include <net/ip.h>
9 #include "qlcnic.h"
10 #include "qlcnic_hdr.h"
11 #include "qlcnic_83xx_hw.h"
12 #include "qlcnic_hw.h"
274 return hdr->saved_state[index]; in qlcnic_82xx_get_saved_state()
282 hdr->saved_state[index] = value; in qlcnic_82xx_set_saved_state()
289 hdr = fw_dump->tmpl_hdr; in qlcnic_82xx_cache_tmpl_hdr_values()
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