Home
last modified time | relevance | path

Searched +full:rockchip +full:- +full:display (Results 1 – 25 of 61) sorted by relevance

123

/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip-drm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-drm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip DRM master device
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 The Rockchip DRM master device is a virtual device needed to list all
15 vop devices or other display interface nodes that comprise the
20 const: rockchip,display-subsystem
[all …]
H A Drockchip,dw-mipi-dsi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip specific extensions to the Synopsys Designware MIPI DSI
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
16 - enum:
17 - rockchip,px30-mipi-dsi
18 - rockchip,rk3128-mipi-dsi
[all …]
H A Drockchip,rk3588-mipi-dsi2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip specific extensions to the Synopsys Designware MIPI DSI2
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3588-mipi-dsi2
26 clock-names:
28 - const: pclk
29 - const: sys
[all …]
H A Drockchip,rk3399-cdn-dp.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3399-cdn-dp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3399 specific extensions to the CDN Display Port
10 - Andy Yan <andy.yan@rock-chip.com>
11 - Heiko Stuebner <heiko@sntech.de>
12 - Sandy Huang <hjc@rock-chips.com>
15 - $ref: /schemas/sound/dai-common.yaml#
20 - const: rockchip,rk3399-cdn-dp
[all …]
H A Drockchip,lvds.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip low-voltage differential signal (LVDS) transmitter
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
16 - rockchip,px30-lvds
17 - rockchip,rk3288-lvds
25 clock-names:
[all …]
H A Drockchip,rk3066-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip rk3066 HDMI controller
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 - $ref: /schemas/sound/dai-common.yaml#
18 const: rockchip,rk3066-hdmi
29 clock-names:
[all …]
H A Drockchip,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip DWC HDMI TX Encoder
10 - Mark Yao <markyao0591@gmail.com>
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
18 - $ref: /schemas/sound/dai-common.yaml#
23 - rockchip,rk3228-dw-hdmi
24 - rockchip,rk3288-dw-hdmi
[all …]
/linux/drivers/phy/rockchip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Rockchip platforms
6 tristate "Rockchip Display Port PHY Driver"
10 Enable this to support the Rockchip Display Port PHY.
13 tristate "Rockchip MIPI Synopsys DPHY RX0 driver"
18 Enable this to support the Rockchip MIPI Synopsys DPHY RX0
19 associated to the Rockchip ISP module present in RK3399 SoCs.
22 will be called phy-rockchip-dphy-rx0.
25 tristate "Rockchip EMMC PHY Driver"
29 Enable this to support the Rockchip EMMC PHY.
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-wolfvision-pf5-display.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
8 /dts-v1/;
11 #include <dt-bindings/clock/rk3568-cru.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/rockchip.h>
15 #include <dt-bindings/soc/rockchip,vop2.h>
19 compatible = "pwm-backlight";
20 brightness-levels = <0 255>;
21 default-brightness-level = <255>;
[all …]
H A Drk3399-nanopi-r4s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * FriendlyElec NanoPC-R4 board device tree source
15 /dts-v1/;
17 #include "rk3399-nanopi4.dtsi"
20 /delete-node/ display-subsystem;
22 gpio-leds {
23 pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
25 /delete-node/ led-0;
27 lan_led: led-lan {
32 sys_led: led-sys {
[all …]
H A Dpx30-cobra-ltk500hd1829.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "px30-cobra.dtsi"
10 model = "Theobroma Systems Cobra prototype with LTK500HD1829 Display";
11 compatible = "tsd,px30-cobra-ltk500hd1829", "tsd,px30-cobra", "rockchip,px30";
25 iovcc-supply = <&vcc_1v8>;
26 pinctrl-names = "default";
27 pinctrl-0 = <&dsp_rst>;
28 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
29 vcc-supply = <&vcc_2v8>;
[all …]
H A Dpx30-cobra-ltk050h3146w-a2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "px30-cobra.dtsi"
10 model = "Theobroma Systems Cobra with LTK050H3146W-A2 Display";
11 compatible = "tsd,px30-cobra-ltk050h3146w-a2", "tsd,px30-cobra", "rockchip,px30";
18 compatible = "leadtek,ltk050h3146w-a2";
21 iovcc-supply = <&vcc_1v8>;
22 pinctrl-names = "default";
23 pinctrl-0 = <&dsp_rst>;
24 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
[all …]
/linux/Documentation/devicetree/bindings/spi/
H A Dspi-rockchip.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SPI Controller
10 The Rockchip SPI controller is used to interface with various devices such
11 as flash and display controllers using the SPI communication interface.
14 - $ref: spi-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rk3036-spi
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Drockchip,rk3288-dp-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,rk3288-dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip specific extensions to the Analogix Display Port PHY
10 - Heiko Stuebner <heiko@sntech.de>
14 const: rockchip,rk3288-dp-phy
19 clock-names:
22 "#phy-cells":
26 - compatible
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Drockchip,rk3288-cru.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,rk3288-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3288 Clock and Reset Unit (CRU)
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
19 different so another dt-compatible is available. Noticed that it is only
25 preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be
31 clock-output-names:
[all …]
/linux/Documentation/devicetree/bindings/soc/rockchip/
H A Dgrf.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/soc/rockchip/grf.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip General Register Files (GRF)
10 - Heiko Stuebner <heiko@sntech.de>
15 - items:
16 - enum:
17 - rockchip,rk3288-sgrf
18 - rockchip,rk3528-ioc-grf
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drv1108-elgin-r1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
13 compatible = "elgin,rv1108-r1", "rockchip,rv1108";
25 stdout-path = "serial2:1500000n8";
28 vcc_sys: regulator-vsys {
29 compatible = "regulator-fixed";
30 regulator-name = "vsys";
31 regulator-min-microvolt = <5000000>;
32 regulator-max-microvolt = <5000000>;
33 regulator-boot-on;
[all …]
H A Drk3188.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3188-cru.h>
10 #include <dt-bindings/power/rk3188-power.h>
14 compatible = "rockchip,rk3188";
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
[all …]
H A Drk3066a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3066a-cru.h>
10 #include <dt-bindings/power/rk3066-power.h>
14 compatible = "rockchip,rk3066a";
22 #address-cells = <1>;
23 #size-cells = <0>;
24 enable-method = "rockchip,rk3066-smp";
28 compatible = "arm,cortex-a9";
[all …]
H A Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
H A Drk3128.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
6 #include <dt-bindings/clock/rk3128-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3128-power.h>
14 compatible = "rockchip,rk3128";
15 interrupt-parent = <&gic>;
[all …]
H A Drk322x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3228-cru.h>
8 #include <dt-bindings/thermal/thermal.h>
9 #include <dt-bindings/power/rk3228-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
/linux/Documentation/admin-guide/media/
H A Dplatform-cardlist.rst1 .. SPDX-License-Identifier: GPL-2.0
17 am437x-vpfe TI AM437x VPFE
18 aspeed-video Aspeed AST2400 and AST2500
19 atmel-isc ATMEL Image Sensor Controller (ISC)
20 atmel-isi ATMEL Image Sensor Interface (ISI)
24 cdns-csi2rx Cadence MIPI-CSI2 RX Controller
25 cdns-csi2tx Cadence MIPI-CSI2 TX Controller
26 coda-vpu Chips&Media Coda multi-standard codec IP
29 exynos-fimc-is EXYNOS4x12 FIMC-IS (Imaging Subsystem)
30 exynos-fimc-lite EXYNOS FIMC-LITE camera interface
[all …]
/linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_drv.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) Rockchip Electronics Co., Ltd.
4 * Author:Mark Yao <mark.yao@rock-chips.com>
25 * display output interface supported by rockchip lcdc
61 * Rockchip drm private structure.
65 * @mm_lock: protect drm_mm on multi-threads.
/linux/Documentation/devicetree/bindings/display/panel/
H A Djadard,jd9365da-h3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/jadard,jd9365da-h3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Jadard JD9365DA-HE WXGA DSI panel
10 - Jagan Teki <jagan@edgeble.ai>
13 - $ref: panel-common.yaml#
18 - enum:
19 - chongzhou,cz101b4001
20 - kingdisplay,kd101ne3-40ti
[all …]

123