Home
last modified time | relevance | path

Searched +full:rmii +full:- +full:clk +full:- +full:internal (Results 1 – 25 of 30) sorted by relevance

12

/linux/Documentation/devicetree/bindings/net/
H A Dmediatek-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mediatek-dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biao Huang <biao.huang@mediatek.com>
21 - mediatek,mt2712-gmac
22 - mediatek,mt8188-gmac
23 - mediatek,mt8195-gmac
25 - compatible
28 - $ref: snps,dwmac.yaml#
[all …]
H A Dsti-dwmac.txt10 - compatible : "st,stih407-dwmac"
11 - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
13 - st,gmac_en: this is to enable the gmac into a dedicated sysctl control
15 - pinctrl-0: pin-control for all the MII mode supported.
18 - resets : phandle pointing to the system reset controller with correct
20 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
22 - st,tx-retime-src: This specifies which clk is wired up to the mac for
25 If not passed, the internal clock will be used by default.
26 - sti-ethclk: this is the phy clock.
27 - sti-clkconf: this is an extra sysconfig register, available in new SoCs,
[all …]
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-meson8b.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk.h>
10 #include <linux/clk-provider.h>
49 * internal sampling) or enable (= 1) the internal logic for RXEN and RXD[3:0]
58 /* An internal counte
145 struct clk *clk; meson8b_init_rgmii_tx_clk() local
272 meson8b_devm_clk_prepare_enable(struct meson8b_dwmac * dwmac,struct clk * clk) meson8b_devm_clk_prepare_enable() argument
[all...]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s905w-jethome-jethub-j80.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /dts-v1/;
12 #include "meson-gxl.dtsi"
15 compatible = "jethome,jethub-j80", "amlogic,s905w", "amlogic,meson-gxl";
22 reserved-memory {
37 stdout-path = "serial0:115200n8";
40 vddio_ao18: regulator-vddio-ao18 {
41 compatible = "regulator-fixed";
42 regulator-name = "VDDIO_AO18";
43 regulator-min-microvolt = <1800000>;
[all …]
H A Dmeson-g12a-sei510.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/meson-g12a-gpio.h>
12 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
21 io-channel-names = "buttons";
[all …]
H A Dmeson-axg-jethome-jethub-j1xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /dts-v1/;
12 #include "meson-axg.dtsi"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/thermal/thermal.h>
24 stdout-path = "serial0:115200n8";
27 reserved-memory {
33 emmc_pwrseq: emmc-pwrseq {
34 compatible = "mmc-pwrseq-emmc";
35 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
[all …]
H A Dmeson-sm1-sei610.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-sm1.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/meson-g12a-gpio.h>
12 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
23 mono_dac: audio-codec-0 {
25 #sound-dai-cells = <0>;
26 sound-name-prefix = "U16";
[all …]
H A Dmeson-g12a-u200.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
12 #include <dt-bindings/sound/meson-g12a-toacodec.h>
23 dioo2133: audio-amplifier-0 {
24 compatible = "simple-audio-amplifier";
25 enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
[all …]
/linux/drivers/net/phy/
H A Ddp83822.c1 // SPDX-License-Identifier: GPL-2.0
215 struct net_device *ndev = phydev->attached_dev; in dp83822_config_wol()
219 if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE)) { in dp83822_config_wol()
220 mac = (const u8 *)ndev->dev_addr; in dp83822_config_wol()
223 return -EINVAL; in dp83822_config_wol()
237 if (wol->wolopts & WAKE_MAGIC) in dp83822_config_wol()
242 if (wol->wolopts & WAKE_MAGICSECURE) { in dp83822_config_wol()
245 (wol->sopass[1] << 8) | wol->sopass[0]); in dp83822_config_wol()
248 (wol->sopass[3] << 8) | wol->sopass[2]); in dp83822_config_wol()
251 (wol->sopass[5] << 8) | wol->sopass[4]); in dp83822_config_wol()
[all …]
H A Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
29 #include <linux/clk.h>
131 * The value is calculated as following: (1/1000000)/((2^-32)/4)
137 * The value is calculated as following: (1/1000000)/((2^-32)/8)
451 struct clk *clk; member
566 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
570 if (type && type->interrupt_level_mask) in kszphy_config_intr()
571 mask = type->interrupt_level_mask; in kszphy_config_intr()
583 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in kszphy_config_intr()
[all …]
/linux/drivers/net/ethernet/actions/
H A Dowl-emac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/clk.h>
11 #include <linux/dma-mapping.h>
19 #include "owl-emac.h"
27 return readl(priv->base + reg); in owl_emac_reg_read()
32 writel(data, priv->base + reg); in owl_emac_reg_write()
63 return priv->netdev->dev.parent; in owl_emac_get_dev()
129 return dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); in owl_emac_dma_map_tx()
142 return CIRC_SPACE(ring->head, ring->tail, ring->size); in owl_emac_ring_num_unused()
148 return (cur + 1) & (ring->size - 1); in owl_emac_ring_get_next()
[all …]
/linux/Documentation/networking/device_drivers/ethernet/stmicro/
H A Dstmmac.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 - In This Release
14 - Feature List
15 - Kernel Configuration
16 - Command Line Parameters
17 - Driver Information and Notes
18 - Debug Information
19 - Support
33 (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0
35 DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores
[all …]
/linux/arch/mips/boot/dts/img/
H A Dpistachio.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/pistachio-clk.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #include <dt-bindings/reset/pistachio-resets.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
22 #address-cells = <1>;
[all …]
/linux/arch/sh/boards/mach-ecovec24/
H A Dsetup.c1 // SPDX-License-Identifier: GPL-2.0
39 #include <linux/dma-map-ops.h>
41 #include <media/drv-intf/renesas-ceu.h>
52 *-----------------------------------------
56 * 0x0400_0000 Internal I/O 16/32bit
62 *------------------------------
65 * DS2[2] = RMII / TS, SCIF ON : RMII
71 * DS2[6-7] = MMC / SD ON-OFF : SD
72 * OFF-ON : MMC
76 * FSI - DA7210
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp135f-dk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/st,stm32mp13-regulator.h>
15 #include "stm32mp13-pinctrl.dtsi"
18 model = "STMicroelectronics STM32MP135F-DK Discovery Board";
19 compatible = "st,stm32mp135f-dk", "st,stm32mp135";
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
/linux/arch/powerpc/include/asm/
H A Dcpm2.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * All CPM control and status is available through the CPM2 internal
27 /* Device sub-block and page codes.
72 /* CPM2-specific opcodes (see cpm.h for common opcodes)
106 extern void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src);
153 * get some microcode patches :-).
154 * The parameter ram space for the SMCs is fifty-some bytes, and
169 uint smc_rstate; /* Internal */
170 uint smc_idp; /* Internal */
171 ushort smc_rbptr; /* Internal */
[all …]
/linux/drivers/net/ethernet/cadence/
H A Dmacb_main.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2006 Atmel Corporation
10 #include <linux/clk-provider.h>
11 #include <linux/clk.h>
13 #include <linux/dma-mapping.h>
15 #include <linux/firmware/xlnx-zynqm
[all...]
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7794.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E2 (R8A77940) SoC
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
18 interrupt-parent = <&gic>;
40 compatible = "fixed-clock";
[all …]
H A Dr8a7793.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-N (R8A77930) SoC
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7793-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
[all …]
H A Dr8a7745.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Cogent Embedded Inc.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7745-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
42 compatible = "fixed-clock";
[all …]
H A Dr8a7743.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Cogent Embedded Inc.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7743-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
25 compatible = "fixed-clock";
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am625-beagleplay.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
6 * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation
9 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include "k3-am625.dtsi"
17 compatible = "beagle,am625-beagleplay", "ti,am625";
44 stdout-path = "serial2:115200n8";
[all …]
/linux/drivers/net/ethernet/freescale/
H A Dfec_main.c1 // SPDX-License-Identifier: GPL-2.0+
17 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
20 * Copyright (c) 2004-2006 Macq Electronique SA.
22 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
29 #include <linux/clk.h>
195 { .compatible = "fsl,imx25-fec", .data = &fec_imx25_info, },
196 { .compatible = "fsl,imx27-fec", .data = &fec_imx27_info, },
197 { .compatible = "fsl,imx28-fec", .data = &fec_imx28_info, },
198 { .compatible = "fsl,imx6q-fec", .data = &fec_imx6q_info, },
199 { .compatible = "fsl,mvf600-fec", .data = &fec_mvf600_info, },
[all …]
/linux/drivers/net/ethernet/mediatek/
H A Dmtk_star_emac.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/clk.h>
12 #include <linux/dma-mapping.h>
77 /* Flow-Control Configuration Register */
133 /* Delay-Macro Register */
201 * reuse the same structure for both TX and RX - the layout is the same, only
291 return priv->ndev->dev.parent; in mtk_star_get_dev()
305 ring->descs = descs; in mtk_star_ring_init()
306 ring->head = 0; in mtk_star_ring_init()
307 ring->tail = 0; in mtk_star_ring_init()
[all …]

12