Lines Matching +full:rmii +full:- +full:clk +full:- +full:internal
1 // SPDX-License-Identifier: GPL-2.0
215 struct net_device *ndev = phydev->attached_dev; in dp83822_config_wol()
219 if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE)) { in dp83822_config_wol()
220 mac = (const u8 *)ndev->dev_addr; in dp83822_config_wol()
223 return -EINVAL; in dp83822_config_wol()
237 if (wol->wolopts & WAKE_MAGIC) in dp83822_config_wol()
242 if (wol->wolopts & WAKE_MAGICSECURE) { in dp83822_config_wol()
245 (wol->sopass[1] << 8) | wol->sopass[0]); in dp83822_config_wol()
248 (wol->sopass[3] << 8) | wol->sopass[2]); in dp83822_config_wol()
251 (wol->sopass[5] << 8) | wol->sopass[4]); in dp83822_config_wol()
277 struct dp83822_private *dp83822 = phydev->priv; in dp83822_set_wol()
282 memcpy(&dp83822->wol, wol, sizeof(*wol)); in dp83822_set_wol()
292 wol->supported = (WAKE_MAGIC | WAKE_MAGICSECURE); in dp83822_get_wol()
293 wol->wolopts = 0; in dp83822_get_wol()
298 wol->wolopts |= WAKE_MAGIC; in dp83822_get_wol()
303 wol->sopass[0] = (sopass_val & 0xff); in dp83822_get_wol()
304 wol->sopass[1] = (sopass_val >> 8); in dp83822_get_wol()
308 wol->sopass[2] = (sopass_val & 0xff); in dp83822_get_wol()
309 wol->sopass[3] = (sopass_val >> 8); in dp83822_get_wol()
313 wol->sopass[4] = (sopass_val & 0xff); in dp83822_get_wol()
314 wol->sopass[5] = (sopass_val >> 8); in dp83822_get_wol()
316 wol->wolopts |= WAKE_MAGICSECURE; in dp83822_get_wol()
321 wol->wolopts = 0; in dp83822_get_wol()
326 struct dp83822_private *dp83822 = phydev->priv; in dp83822_config_intr()
331 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in dp83822_config_intr()
340 if (!dp83822->fx_enabled) in dp83822_config_intr()
360 if (!dp83822->fx_enabled) in dp83822_config_intr()
431 struct dp83822_private *dp83822 = phydev->priv; in dp83822_read_status()
436 if (dp83822->fx_enabled) { in dp83822_read_status()
438 phydev->speed = SPEED_UNKNOWN; in dp83822_read_status()
439 phydev->duplex = DUPLEX_UNKNOWN; in dp83822_read_status()
462 phydev->duplex = DUPLEX_FULL; in dp83822_read_status()
464 phydev->duplex = DUPLEX_HALF; in dp83822_read_status()
467 phydev->speed = SPEED_10; in dp83822_read_status()
469 phydev->speed = SPEED_100; in dp83822_read_status()
476 struct dp83822_private *dp83822 = phydev->priv; in dp83822_config_init_leds()
479 if (dp83822->led_pin_enable[DP83822_LED_INDEX_LED_0]) { in dp83822_config_init_leds()
486 } else if (dp83822->led_pin_enable[DP83822_LED_INDEX_COL_GPIO2]) { in dp83822_config_init_leds()
495 if (dp83822->led_pin_enable[DP83822_LED_INDEX_LED_1_GPIO1]) { in dp83822_config_init_leds()
504 if (dp83822->led_pin_enable[DP83822_LED_INDEX_RX_D3_GPIO3]) { in dp83822_config_init_leds()
518 struct dp83822_private *dp83822 = phydev->priv; in dp83822_config_init()
525 if (dp83822->set_gpio2_clk_out) in dp83822_config_init()
532 dp83822->gpio2_clk_out)); in dp83822_config_init()
534 if (dp83822->tx_amplitude_100base_tx_index >= 0) in dp83822_config_init()
538 dp83822->tx_amplitude_100base_tx_index)); in dp83822_config_init()
540 if (dp83822->mac_termination_index >= 0) in dp83822_config_init()
544 dp83822->mac_termination_index)); in dp83822_config_init()
553 /* Set DP83822_RX_CLK_SHIFT to enable rx clk internal delay */ in dp83822_config_init()
559 /* Set DP83822_TX_CLK_SHIFT to disable tx clk internal delay */ in dp83822_config_init()
581 if (dp83822->fx_enabled) { in dp83822_config_init()
588 linkmode_and(phydev->advertising, phydev->advertising, in dp83822_config_init()
589 phydev->supported); in dp83822_config_init()
592 phydev->supported); in dp83822_config_init()
594 phydev->advertising); in dp83822_config_init()
596 phydev->supported); in dp83822_config_init()
598 phydev->supported); in dp83822_config_init()
600 phydev->advertising); in dp83822_config_init()
602 phydev->advertising); in dp83822_config_init()
614 phydev->autoneg = AUTONEG_DISABLE; in dp83822_config_init()
616 phydev->supported); in dp83822_config_init()
618 phydev->advertising); in dp83822_config_init()
628 if (dp83822->fx_signal_det_low) { in dp83822_config_init()
636 return dp83822_config_wol(phydev, &dp83822->wol); in dp83822_config_init()
641 struct device *dev = &phydev->mdio.dev; in dp8382x_config_rmii_mode()
645 if (!device_property_read_string(dev, "ti,rmii-mode", &of_val)) { in dp8382x_config_rmii_mode()
653 phydev_err(phydev, "Invalid value for ti,rmii-mode property (%s)\n", in dp8382x_config_rmii_mode()
655 ret = -EINVAL; in dp8382x_config_rmii_mode()
667 struct dp83822_private *dp83822 = phydev->priv; in dp83826_config_init()
671 if (phydev->interface == PHY_INTERFACE_MODE_RMII) { in dp83826_config_init()
687 if (dp83822->cfg_dac_minus != DP83826_CFG_DAC_MINUS_DEFAULT) { in dp83826_config_init()
688 val = FIELD_PREP(DP83826_VOD_CFG1_MINUS_MDI_MASK, dp83822->cfg_dac_minus) | in dp83826_config_init()
691 dp83822->cfg_dac_minus)); in dp83826_config_init()
699 dp83822->cfg_dac_minus)); in dp83826_config_init()
706 if (dp83822->cfg_dac_plus != DP83826_CFG_DAC_PLUS_DEFAULT) { in dp83826_config_init()
707 val = FIELD_PREP(DP83826_VOD_CFG2_PLUS_MDIX_MASK, dp83822->cfg_dac_plus) | in dp83826_config_init()
708 FIELD_PREP(DP83826_VOD_CFG2_PLUS_MDI_MASK, dp83822->cfg_dac_plus); in dp83826_config_init()
715 return dp83822_config_wol(phydev, &dp83822->wol); in dp83826_config_init()
720 struct dp83822_private *dp83822 = phydev->priv; in dp83825_config_init()
727 return dp83822_config_wol(phydev, &dp83822->wol); in dp83825_config_init()
738 return phydev->drv->config_init(phydev); in dp83822_phy_reset()
753 struct device_node *node = phydev->mdio.dev.of_node; in dp83822_of_init_leds()
754 struct dp83822_private *dp83822 = phydev->priv; in dp83822_of_init_leds()
774 dp83822->led_pin_enable[index] = true; in dp83822_of_init_leds()
777 return -EINVAL; in dp83822_of_init_leds()
785 if (dp83822->led_pin_enable[DP83822_LED_INDEX_LED_0] && in dp83822_of_init_leds()
786 dp83822->led_pin_enable[DP83822_LED_INDEX_COL_GPIO2]) { in dp83822_of_init_leds()
788 return -EINVAL; in dp83822_of_init_leds()
791 if (dp83822->led_pin_enable[DP83822_LED_INDEX_COL_GPIO2] && in dp83822_of_init_leds()
792 dp83822->set_gpio2_clk_out) { in dp83822_of_init_leds()
794 return -EINVAL; in dp83822_of_init_leds()
797 if (dp83822->led_pin_enable[DP83822_LED_INDEX_RX_D3_GPIO3] && in dp83822_of_init_leds()
798 phydev->interface != PHY_INTERFACE_MODE_RMII) { in dp83822_of_init_leds()
799 phydev_err(phydev, "RX_D3 can only be used as LED output when in RMII mode\n"); in dp83822_of_init_leds()
800 return -EINVAL; in dp83822_of_init_leds()
808 struct dp83822_private *dp83822 = phydev->priv; in dp83822_of_init()
809 struct device *dev = &phydev->mdio.dev; in dp83822_of_init()
818 if (dp83822->fx_enabled && dp83822->fx_sd_enable) in dp83822_of_init()
819 dp83822->fx_signal_det_low = device_property_present(dev, in dp83822_of_init()
820 "ti,link-loss-low"); in dp83822_of_init()
821 if (!dp83822->fx_enabled) in dp83822_of_init()
822 dp83822->fx_enabled = device_property_present(dev, in dp83822_of_init()
823 "ti,fiber-mode"); in dp83822_of_init()
825 if (!device_property_read_string(dev, "ti,gpio2-clk-out", &of_val)) { in dp83822_of_init()
826 if (strcmp(of_val, "mac-if") == 0) { in dp83822_of_init()
827 dp83822->gpio2_clk_out = DP83822_CLK_SRC_MAC_IF; in dp83822_of_init()
829 dp83822->gpio2_clk_out = DP83822_CLK_SRC_XI; in dp83822_of_init()
830 } else if (strcmp(of_val, "int-ref") == 0) { in dp83822_of_init()
831 dp83822->gpio2_clk_out = DP83822_CLK_SRC_INT_REF; in dp83822_of_init()
832 } else if (strcmp(of_val, "rmii-master-mode-ref") == 0) { in dp83822_of_init()
833 dp83822->gpio2_clk_out = DP83822_CLK_SRC_RMII_MASTER_MODE_REF; in dp83822_of_init()
834 } else if (strcmp(of_val, "free-running") == 0) { in dp83822_of_init()
835 dp83822->gpio2_clk_out = DP83822_CLK_SRC_FREE_RUNNING; in dp83822_of_init()
837 dp83822->gpio2_clk_out = DP83822_CLK_SRC_RECOVERED; in dp83822_of_init()
840 "Invalid value for ti,gpio2-clk-out property (%s)\n", in dp83822_of_init()
842 return -EINVAL; in dp83822_of_init()
845 dp83822->set_gpio2_clk_out = true; in dp83822_of_init()
854 dp83822->tx_amplitude_100base_tx_index = i; in dp83822_of_init()
859 if (dp83822->tx_amplitude_100base_tx_index < 0) { in dp83822_of_init()
861 "Invalid value for tx-amplitude-100base-tx-percent property (%u)\n", in dp83822_of_init()
863 return -EINVAL; in dp83822_of_init()
871 dp83822->mac_termination_index = i; in dp83822_of_init()
876 if (dp83822->mac_termination_index < 0) { in dp83822_of_init()
878 "Invalid value for mac-termination-ohms property (%u)\n", in dp83822_of_init()
880 return -EINVAL; in dp83822_of_init()
889 int tmp = DP83826_CFG_DAC_PERCENT_DEFAULT - percent; in dp83826_to_dac_minus_one_regval()
896 int tmp = percent - DP83826_CFG_DAC_PERCENT_DEFAULT; in dp83826_to_dac_plus_one_regval()
903 struct dp83822_private *dp83822 = phydev->priv; in dp83826_of_init()
904 struct device *dev = &phydev->mdio.dev; in dp83826_of_init()
907 dp83822->cfg_dac_minus = DP83826_CFG_DAC_MINUS_DEFAULT; in dp83826_of_init()
908 if (!device_property_read_u32(dev, "ti,cfg-dac-minus-one-bp", &val)) in dp83826_of_init()
909 dp83822->cfg_dac_minus += dp83826_to_dac_minus_one_regval(val); in dp83826_of_init()
911 dp83822->cfg_dac_plus = DP83826_CFG_DAC_PLUS_DEFAULT; in dp83826_of_init()
912 if (!device_property_read_u32(dev, "ti,cfg-dac-plus-one-bp", &val)) in dp83826_of_init()
913 dp83822->cfg_dac_plus += dp83826_to_dac_plus_one_regval(val); in dp83826_of_init()
928 struct dp83822_private *dp83822 = phydev->priv; in dp83822_read_straps()
941 dp83822->fx_enabled = 1; in dp83822_read_straps()
943 if (dp83822->fx_enabled) { in dp83822_read_straps()
947 dp83822->fx_sd_enable = 1; in dp83822_read_straps()
957 dp83822 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83822), in dp8382x_probe()
960 return -ENOMEM; in dp8382x_probe()
962 dp83822->tx_amplitude_100base_tx_index = -1; in dp8382x_probe()
963 dp83822->mac_termination_index = -1; in dp8382x_probe()
964 phydev->priv = dp83822; in dp8382x_probe()
978 dp83822 = phydev->priv; in dp83822_probe()
988 if (dp83822->fx_enabled) in dp83822_probe()
989 phydev->port = PORT_FIBRE; in dp83822_probe()
1055 return -EOPNOTSUPP; in dp83822_led_mode()