Searched +full:riscv +full:- +full:zabha (Results 1 – 5 of 5) sorted by relevance
| /linux/arch/riscv/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 4 # see Documentation/kbuild/kconfig-language.rst. 13 config RISCV config 65 # clang >= 17: https://github.com/llvm/llvm-project/commit/62fa708ceb027713b386c7e0efda994f8bdc27e2 234 # -Zsanitizer=shadow-call-stack flag. 244 depends on $(cc-option,-fpatchable-function-entry=8) 248 def_bool $(cc-option,-fsanitize=shadow-call-stack) 249 …# https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444… 250 depends on $(ld-option,--no-relax-gp) 252 # https://github.com/llvm/llvm-project/commit/bbc0f99f3bc96f1db16f649fc21dd18e5b0918f6 [all …]
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| H A D | Makefile | 2 # architecture-specific flags and dependencies. 9 LDFLAGS_vmlinux := -z norelro 11 LDFLAGS_vmlinux += -shared -Bsymbolic -z notext 12 KBUILD_CFLAGS += -fPIE 15 LDFLAGS_vmlinux += --no-relax 16 KBUILD_CPPFLAGS += -DCC_USING_PATCHABLE_FUNCTION_ENTRY 18 CC_FLAGS_FTRACE := -fpatchable-function-entry=8,4 20 CC_FLAGS_FTRACE := -fpatchable-function-entry=4,2 25 KBUILD_CFLAGS_MODULE += -mcmodel=medany 33 KBUILD_CFLAGS += -mabi=lp64 [all …]
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| /linux/Documentation/arch/riscv/ |
| H A D | hwprobe.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 RISC-V Hardware Probing Interface 4 --------------------------------- 6 The RISC-V hardware probing interface is based around a single syscall, which 18 The arguments are split into three groups: an array of key-value pairs, a CPU 19 set, and some flags. The key-value pairs are supplied with a count. Userspace 22 will be cleared to -1, and its value set to 0. The CPU set is defined by 23 CPU_SET(3) with size ``cpusetsize`` bytes. For value-like keys (eg. vendor, 25 have the same value. Otherwise -1 will be returned. For boolean-like keys, the 33 by sys_riscv_hwprobe() to only those which match each of the key-value pairs. [all …]
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| /linux/arch/riscv/kernel/ |
| H A D | cpufeature.c | 1 // SPDX-License-Identifier: GPL-2.0-only 24 #include <asm/text-patching.h> 32 #define NUM_ALPHA_EXTS ('z' - 'a' + 1) 43 /* Per-cpu ISA extensions. */ 49 * riscv_isa_extension_base() - Get base extension word 63 * __riscv_isa_extension_available() - Check whether given extension 89 return -EPROBE_DEFER; in riscv_ext_f_depends() 96 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_ext_zicbom_validate() 97 return -EINVAL; in riscv_ext_zicbom_validate() 100 pr_err("Zicbom disabled as cbom-block-size present, but is not a power-of-2\n"); in riscv_ext_zicbom_validate() [all …]
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| H A D | sys_hwprobe.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * are supported by the hardware. See Documentation/arch/riscv/hwprobe.rst for 30 u64 id = -1ULL; in hwprobe_arch_id() 34 if (pair->key != RISCV_HWPROBE_KEY_MVENDORID && in hwprobe_arch_id() 35 pair->key != RISCV_HWPROBE_KEY_MIMPID && in hwprobe_arch_id() 36 pair->key != RISCV_HWPROBE_KEY_MARCHID) in hwprobe_arch_id() 42 switch (pair->key) { in hwprobe_arch_id() 60 * If there's a mismatch for the given set, return -1 in the in hwprobe_arch_id() 64 id = -1ULL; in hwprobe_arch_id() 70 pair->value = id; in hwprobe_arch_id() [all …]
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