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Searched +full:riscv +full:- +full:aia (Results 1 – 8 of 8) sorted by relevance

/linux/arch/riscv/kvm/
H A Daia_device.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/irqchip/riscv-imsic.h>
19 struct kvm *kvm = dev->kvm; in aia_create()
23 return -EEXIST; in aia_create()
25 ret = -EBUSY; in aia_create()
30 if (vcpu->arch.ran_atleast_once) in aia_create()
35 kvm->arch.aia.in_kernel = true; in aia_create()
50 struct kvm_aia *aia = &kvm->arch.aia; in aia_config() local
54 return -EBUSY; in aia_config()
66 * supported on host with non-zero guest in aia_config()
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H A Daia.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/irqchip/riscv-imsic.h>
50 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; in kvm_riscv_vcpu_aia_flush_interrupts()
56 if (READ_ONCE(vcpu->arch.irqs_pending_mask[1])) { in kvm_riscv_vcpu_aia_flush_interrupts()
57 mask = xchg_acquire(&vcpu->arch.irqs_pending_mask[1], 0); in kvm_riscv_vcpu_aia_flush_interrupts()
58 val = READ_ONCE(vcpu->arch.irqs_pending[1]) & mask; in kvm_riscv_vcpu_aia_flush_interrupts()
60 csr->hviph &= ~mask; in kvm_riscv_vcpu_aia_flush_interrupts()
61 csr->hviph |= val; in kvm_riscv_vcpu_aia_flush_interrupts()
67 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; in kvm_riscv_vcpu_aia_sync_interrupts()
70 csr->vsieh = ncsr_read(CSR_VSIEH); in kvm_riscv_vcpu_aia_sync_interrupts()
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H A Daia_imsic.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/irqchip/riscv-imsic.h>
45 * 1) Hardware: IMSIC VS-file (vsfile_cpu >= 0)
46 * 2) Software: IMSIC SW-file (vsfile_cpu < 0)
49 /* IMSIC VS-file */
56 /* IMSIC SW-file */
244 imsic_mrif_atomic_rmw(__mrif, __ptr, __new_val, -1UL)
254 &mrif->eithreshold); in imsic_mrif_topei()
259 eix = &mrif->eix[ei]; in imsic_mrif_topei()
260 eipend[0] = imsic_mrif_atomic_read(mrif, &eix->eie[0]) & in imsic_mrif_topei()
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/linux/drivers/irqchip/
H A Dirq-riscv-aplic-msi.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/irqchip/riscv-aplic.h>
13 #include <linux/irqchip/riscv-imsic.h>
21 #include "irq-riscv-aplic-main.h"
43 * The section "4.9.2 Special consideration for level-sensitive interrupt in aplic_msi_irq_retrigger_level()
44 * sources" of the RISC-V AIA specification says: in aplic_msi_irq_retrigger_level()
52 writel(d->hwirq, priv->regs + APLIC_SETIPNUM_LE); in aplic_msi_irq_retrigger_level()
60 * EOI handling is required only for level-triggered interrupts in aplic_msi_irq_eoi()
73 * Updating sourcecfg register for level-triggered interrupts in aplic_msi_irq_set_type()
84 struct aplic_msicfg *mc = &priv->msicfg; in aplic_msi_write_msg()
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H A Dirq-riscv-intc.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2017-2018 SiFive
8 #define pr_fmt(fmt) "riscv-intc: " fmt
31 unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG; in riscv_intc_irq()
46 * On RISC-V systems local interrupts are masked or unmasked by writing
54 if (IS_ENABLED(CONFIG_32BIT) && d->hwirq >= BITS_PER_LONG) in riscv_intc_irq_mask()
55 csr_clear(CSR_IEH, BIT(d->hwirq - BITS_PER_LONG)); in riscv_intc_irq_mask()
57 csr_clear(CSR_IE, BIT(d->hwirq)); in riscv_intc_irq_mask()
62 if (IS_ENABLED(CONFIG_32BIT) && d->hwirq >= BITS_PER_LONG) in riscv_intc_irq_unmask()
63 csr_set(CSR_IEH, BIT(d->hwirq - BITS_PER_LONG)); in riscv_intc_irq_unmask()
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/linux/arch/riscv/include/asm/
H A Dkvm_host.h1 /* SPDX-License-Identifier: GPL-2.0-only */
91 /* G-stage vmid */
94 /* G-stage page table */
101 /* AIA Guest/VM context */
102 struct kvm_aia aia; member
254 /* AIA VCPU context */
276 /* SBI steal-time accounting */
285 * arrived in guest context. For riscv, any event that arrives while a vCPU is
/linux/Documentation/devicetree/bindings/riscv/
H A Dextensions.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/riscv/extensions.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V ISA extensions
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
12 - Conor Dooley <conor@kernel.org>
15 RISC-V has a large number of extensions, some of which are "standard"
16 extensions, meaning they are ratified by RISC-V International, and others
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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