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/linux/Documentation/devicetree/bindings/net/
H A Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
22 pattern: '^mdio(-(bus|external))?(@.+|-([0-9]+))?$'
24 "#address-cells":
27 "#size-cells":
[all …]
H A Dhisilicon-femac.txt4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
13 - resets: should contain the phandle to the MAC reset signal(required) and
14 the PHY reset signal(optional).
15 - reset-names: should contain the reset signal name "mac"(required)
[all …]
H A Dhisilicon-hix5hd2-gmac.txt4 - compatible: should contain one of the following SoC strings:
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
13 - reg: specifies base physical address(s) and size of the device registers.
16 - interrupts: should contain the MAC interrupt.
17 - #address-cells: must be <1>.
18 - #size-cells: must be <0>.
[all …]
/linux/arch/riscv/boot/dts/spacemit/
H A Dk1-orangepi-r2s.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include "k1-pinctrl.dtsi"
13 compatible = "xunlong,orangepi-r2s", "spacemit,k1";
22 stdout-path = "serial0";
27 bus-width = <8>;
28 mmc-hs400-1_8v;
29 mmc-hs400-enhanced-strobe;
30 non-removable;
31 no-sd;
[all …]
H A Dk1-orangepi-rv2.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
10 #include "k1-pinctrl.dtsi"
14 compatible = "xunlong,orangepi-rv2", "spacemit,k1";
23 stdout-path = "serial0";
27 compatible = "gpio-leds";
30 label = "sys-led";
32 linux,default-trigger = "heartbeat";
33 default-state = "on";
39 phy-handle = <&rgmii0>;
[all …]
H A Dk1-bananapi-f3.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include "k1-pinctrl.dtsi"
10 model = "Banana Pi BPI-F3";
11 compatible = "bananapi,bpi-f3", "spacemit,k1";
22 stdout-path = "serial0";
26 compatible = "gpio-leds";
29 label = "sys-led";
31 linux,default-trigger = "heartbeat";
32 default-state = "on";
36 reg_dc_in: dc-in-12v {
[all …]
H A Dk1-musepi-pro.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
11 #include "k1-pinctrl.dtsi"
15 compatible = "spacemit,musepi-pro", "spacemit,k1";
23 stdout-path = "serial0";
27 compatible = "gpio-leds";
30 label = "sys-led";
32 linux,default-trigger = "heartbeat";
33 default-state = "on";
39 bus-width = <8>;
[all …]
/linux/Documentation/devicetree/bindings/mmc/
H A Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
14 of common properties between various SOC designs. It thus enables us to use
19 const: mmc-pwrseq-simple
21 reset-gpios:
26 contains a list of GPIO specifiers. The reset GPIOs are asserted
28 They will be de-asserted right after the power has been provided to the
[all …]
/linux/drivers/mmc/host/
H A Dsdhci-bcm-kona.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/delay.h>
14 #include <linux/mmc/slot-gpio.h>
16 #include "sdhci-pltfm.h"
52 /* This timeout should be sufficent for core to reset */ in sdhci_bcm_kona_sd_reset()
55 /* reset the host using the top level reset */ in sdhci_bcm_kona_sd_reset()
62 pr_err("Error: sd host is stuck in reset!!!\n"); in sdhci_bcm_kona_sd_reset()
63 return -EFAULT; in sdhci_bcm_kona_sd_reset()
67 /* bring the host out of reset */ in sdhci_bcm_kona_sd_reset()
72 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS) in sdhci_bcm_kona_sd_reset()
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
H A Dimx6dl-victgo.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
9 #include "imx6qdl-vicut1.dtsi"
15 gpio-keys {
16 compatible = "gpio-keys";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_gpiokeys>;
21 key-power {
25 wakeup-source;
28 key-enter {
[all …]
H A Dimx6dl-plym2m.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
17 stdout-path = &uart4;
21 compatible = "pwm-backlight";
23 brightness-levels = <0 1000>;
24 num-interpolated-steps = <20>;
25 default-brightness-level = <19>;
26 power-supply = <&reg_12v0>;
[all …]
/linux/drivers/reset/
H A Dreset-k230.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2022-2024 Canaan Bright Sight Co., Ltd
4 * Copyright (C) 2024-2025 Junhui Liu <junhui.liu@pigmoral.tech>
6 * The reset management module in the K230 SoC provides reset time control
8 * during which reset is applied or removed while the clock is stopped can be
10 * up to 255 * 0.25 = 63.75 µs. For RST_TYPE_FLUSH, the reset bit is
13 * Although this driver does not configure the reset time registers, delays have
14 * been added to the assert, deassert, and reset operations to cover the maximum
15 * reset time. Some reset types include done bits whose toggle does not
16 * unambiguously signal whether hardware reset removal or clock-stop period
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-prt8ml.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
16 stdout-path = &uart4;
19 pcie_refclk: pcie0-refclk {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <100000000>;
25 pcie_refclk_oe: pcie0-refclk-oe {
26 compatible = "gpio-gate-clock";
27 pinctrl-names = "default";
[all …]
H A Dimx8mp-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/usb/pd.h>
16 model = "Variscite VAR-SOM-MX8M Plus module";
19 stdout-path = &uart2;
22 gpio-leds {
23 compatible = "gpio-leds";
25 led-0 {
[all …]
H A Dmba8xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
3 * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/ti-dp83867.h>
14 compatible = "iio-hwmon";
15 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>;
23 backlight_lvds: backlight-lvds {
24 compatible = "pwm-backlight";
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp151c-mect1s.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
21 stdout-path = "serial0:1500000n8";
33 v3v3: regulator-v3v3 {
34 compatible = "regulator-fixed";
[all …]
H A Dstm32mp151a-prtt1c.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "stm32mp151a-prtt1l.dtsi"
14 clock_ksz9031: clock-ksz9031 {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <25000000>;
20 clock_sja1105: clock-sja1105 {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
[all …]
/linux/Documentation/devicetree/bindings/input/
H A Dsyna,rmi4.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jason A. Donenfeld <Jason@zx2c4.com>
11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com
12 - Vincent Huang <vincent.huang@tw.synaptics.com>
22 - syna,rmi4-i2c
23 - syna,rmi4-spi
28 '#address-cells':
31 '#size-cells':
[all …]
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun55i-a527-cubie-a5e.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
4 /dts-v1/;
6 #include "sun55i-a523.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
13 compatible = "radxa,cubie-a5e", "allwinner,sun55i-a527";
22 stdout-path = "serial0:115200n8";
26 compatible = "gpio-leds";
28 power-led {
32 default-state = "on";
[all …]
H A Dsun55i-t527-avaota-a1.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
4 /dts-v1/;
6 #include "sun55i-a523.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "yuzukihd,avaota-a1", "allwinner,sun55i-t527";
21 stdout-path = "serial0:115200n8";
24 ext_osc32k: ext-osc32k-clk {
25 #clock-cells = <0>;
26 compatible = "fixed-clock";
27 clock-frequency = <32768>;
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos4412-galaxy-s3.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/leds/common.h>
11 #include "exynos4412-midas.dtsi"
19 led-controller {
21 flen-gpios = <&gpj1 1 GPIO_ACTIVE_HIGH>;
22 enset-gpios = <&gpj1 2 GPIO_ACTIVE_HIGH>;
24 pinctrl-names = "default", "host", "isp";
25 pinctrl-0 = <&camera_flash_host>;
26 pinctrl-1 = <&camera_flash_host>;
[all …]
/linux/drivers/clk/qcom/
H A Dclk-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/delay.h>
12 #include <linux/clk-provider.h>
17 #include "clk-pll.h"
31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_enable()
40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_enable()
46 * H/W requires a 5us delay between disabling the bypass and in clk_pll_enable()
47 * de-asserting the reset. Delay 10us just to be safe. in clk_pll_enable()
51 /* De-assert active-low PLL reset. */ in clk_pll_enable()
52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_enable()
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-rock-3b.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/soc/rockchip,vop2.h>
13 compatible = "radxa,rock-3b", "rockchip,rk3568";
24 stdout-path = "serial2:1500000n8";
27 hdmi-con {
28 compatible = "hdmi-connector";
[all …]
H A Drk3568-9tripod-x3568-v4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/soc/rockchip,vop2.h>
13 compatible = "9tripod,x3568-v4", "rockchip,rk3568";
25 stdout-path = "serial2:1500000n8";
28 adc-keys {
[all …]

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