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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_serdes_internal_regs.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
47 * RX and TX lane hard reset
48 * 0 - Hard reset is asserted
49 * 1 - Hard reset is de-asserted
57 * RX and TX lane hard reset control
58 * 0 - Hard reset is taken from the interface pins
59 * 1 - Hard reset is taken from registers
121 * PMA serial RX-to-TX loop-back enable (from AGC to IO Driver). Serial receive
122 * to transmit loopback: 0 - Disables loopback 1 - Transmits the untimed,
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H A Dal_hal_serdes_hssp_internal_regs.h9 found at http://www.gnu.org/licenses/gpl-2.0.html
46 * RX and TX lane hard reset
47 * 0 - Hard reset is asserted
48 * 1 - Hard reset is de-asserted
56 * RX and TX lane hard reset control
57 * 0 - Hard reset is taken from the interface pins
58 * 1 - Hard reset is taken from registers
120 * PMA serial RX-to-TX loop-back enable (from AGC to IO Driver). Serial receive
121 * to transmit loopback: 0 - Disables loopback 1 - Transmits the untimed,
128 * PMA TX-to-RX buffered serial loop-back enable (bypasses IO Driver). Serial
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H A Dal_hal_serdes_25g_regs.h9 found at http://www.gnu.org/licenses/gpl-2.0.html
132 /* Bit-wise write enable */
139 * 0x1 – Select inter-macro reference clock from the left side
141 * 0x3 – Select inter-macro reference clock from the right side
156 * 0x2 – Select inter-macro reference clock input from right side
172 * 0x2 – Select inter-macro reference clock input from left side
186 * Program memory acknowledge - Only when the access
193 * Data memory acknowledge - Only when the access
200 * 0 - keep cpu clk as sb clk
205 * 0x0 – OIF CEI-28G-SR
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/freebsd/sys/contrib/device-tree/Bindings/power/reset/
H A Dgpio-restart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/gpi
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H A Dgpio-restart.txt4 This binding supports level and edge triggered reset. At driver load
6 handler. If the optional properties 'open-source' is not found, the GPIO line
11 priority order. The gpio is configured as an output, and driven active,
12 triggering a level triggered reset condition. This will also cause an
13 inactive->active edge condition, triggering positive edge triggered
14 reset. After a delay specified by active-delay, the GPIO is set to
15 inactive, thus causing an active->inactive edge, triggering negative edge
16 triggered reset. After a delay specified by inactive-delay, the GPIO
17 is driven active again. After a delay specified by wait-delay, the
21 - compatible : should be "gpio-restart".
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/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-mdm9615-wp8548-mangoh-green.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
13 #include "qcom-mdm9615-wp8548.dtsi"
17 compatible = "swir,mangoh-gree
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/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dsnps,dw-reset.txt1 Synopsys DesignWare Reset controller
4 Please also refer to reset.txt in this directory for common reset
9 - compatible: should be one of the following.
10 "snps,dw-high-reset" - for active high configuration
11 "snps,dw-low-reset" - for active low configuration
13 - reg: physical base address of the controller and length of memory mapped
16 - #reset-cells: must be 1.
20 dw_rst_1: reset-controller@0000 {
21 compatible = "snps,dw-high-reset";
23 #reset-cells = <1>;
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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dtlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-t
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H A Dti,tlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
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H A Drohm,bd28623.txt5 to GPIOs: reset and mute.
8 - compatible : should be "rohm,bd28623"
9 - #sound-dai-cells: should be 0.
10 - VCCA-supply : regulator phandle for the VCCA supply
11 - VCCP1-supply : regulator phandle for the VCCP1 supply
12 - VCCP2-supply : regulator phandle for the VCCP2 supply
15 - reset-gpios : GPIO specifier for the active low reset line
16 - mute-gpios : GPIO specifier for the active low mute line
22 #sound-dai-cells = <0>;
24 VCCA-supply = <&vcc_reg>;
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/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Daptina,mt9v111.txt2 ----------------------------
4 The Aptina MT9V111 is a 1/4-Inch VGA-format digital image sensor with a core
7 The sensor has an active pixel array of 640x480 pixels and can output a number
8 of image resolution and formats controllable through a simple two-wires
12 --------------------
14 - compatible: shall be "aptina,mt9v111".
15 - clocks: reference to the system clock input provider.
18 --------------------
20 - enable-gpios: output enable signal, pin name "OE#". Active low.
21 - standby-gpios: low power state control signal, pin name "STANDBY".
[all …]
H A Daptina,mt9v111.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo@jmondi.org>
13 The Aptina MT9V111 is a 1/4-Inch VGA-format digital image sensor with a core
16 The sensor has an active pixel array of 640x480 pixels and can output a number
17 of image resolutions and formats controllable through a simple two-wires
30 enable-gpios:
31 description: Enable signal, pin name "OE#". Active low.
34 standby-gpios:
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H A Dov7670.txt8 - compatible: should be "ovti,ov7670"
9 - clocks: reference to the xclk input clock.
10 - clock-names: should be "xclk".
13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
14 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
17 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
18 Active is low.
19 - powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any.
20 Active is high.
21 - ov7670,pclk-hb-disable: a boolean property to suppress pixel clock output
[all …]
H A Dov5640.txt1 * Omnivision OV5640 MIPI CSI-2 / parallel sensor
4 - compatible: should be "ovti,ov5640"
5 - clocks: reference to the xclk input clock.
6 - clock-names: should be "xclk".
7 - DOVDD-supply: Digital I/O voltage supply, 1.8 volts
8 - AVDD-supply: Analog voltage supply, 2.8 volts
9 - DVDD-supply: Digital core voltage supply, 1.5 volts
12 - reset-gpios: reference to the GPIO connected to the reset pin, if any.
13 This is an active low signal to the OV5640.
14 - powerdown-gpios: reference to the GPIO connected to the powerdown pin,
[all …]
H A Dadv7604.txt12 - compatible: Must contain one of the following
13 - "adi,adv7611" for the ADV7611
14 - "adi,adv7612" for the ADV7612
16 - reg: I2C slave addresses
17 The ADV76xx has up to thirteen 256-byte maps that can be accessed via the
22 - hpd-gpios: References to the GPIOs that control the HDMI hot-plug
23 detection pins, one per HDMI input. The active flag indicates the GPIO
24 level that enables hot-plug detection.
28 Documentation/devicetree/bindings/media/video-interfaces.txt. The port nodes
32 ------------------------------------------------------------
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/freebsd/sys/contrib/device-tree/Bindings/display/panel/
H A Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Lauren
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/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Ddove-cm-a510.dtsi2 * Device Tree include for Compulab CM-A510 System-on-Module
6 * This file is dual-licensed: you can use it either under the terms
46 * The CM-A510 comes with several optional components:
66 * U2: 2 dual-role USB2.0 ports
70 * W: Broadcom BCM4319 802.11b/g/n (USI WM-N-BM-01 on SDIO1)
72 * GPIOs used on CM-A51
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H A Darmada-385-clearfog-gtr.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work
9 SERDES mapping -
10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0
12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1
14 4. mini PCIe CON2 - PCIe2
17 USB 2.0 mapping -
18 0. USB 2.0 - 0 USB pins header CON12
19 1. USB 2.0 - 1 mini PCIe CON2
20 2. USB 2.0 - 2 to USB 3.0 connector (used with SERDES #3)
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H A Ddove-sbc-a510.dts2 * Device Tree file for Compulab SBC-A510 Single Board Computer
6 * This file is dual-licensed: you can use it either under the terms
46 * SBC-A510 comprises a PCA9555 I2C GPIO expander its GPIO lines connected to
48 * 0.0 USB0 VBUS_EN (active high)
51 * 0.3 DVI transmitter TI TFP410 PD# (active low power down)
52 * 0.4 LVDS transmitter DS90C365 PD# (active low power down)
53 * 0.5 LCD nRST (active low rese
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx93-tqma9352-mba93xxca.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/pwm/pwm.h>
15 #include "imx93-tqma9352.dtsi"
18 model = "TQ-Systems i.MX93 TQMa93xxLA/TQMa93xxCA on MBa93xxCA starter kit";
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Drockchip-dwmac.txt6 - compatible: should be "rockchip,<name>-gamc"
7 "rockchip,px30-gmac": found on PX30 SoCs
8 "rockchip,rk3128-gmac": found on RK312x SoCs
9 "rockchip,rk3228-gmac": found on RK322x SoCs
10 "rockchip,rk3288-gmac": found on RK3288 SoCs
11 "rockchip,rk3328-gmac": found on RK3328 SoCs
12 "rockchip,rk3366-gmac": found on RK3366 SoCs
13 "rockchip,rk3368-gmac": found on RK3368 SoCs
14 "rockchip,rk3399-gmac": found on RK3399 SoCs
15 "rockchip,rv1108-gmac": found on RV1108 SoCs
[all …]
/freebsd/sys/contrib/device-tree/Bindings/input/touchscreen/
H A Dcyttsp.txt4 - compatible : must be "cypress,cyttsp-i2c" or "cypress,cyttsp-spi"
5 - reg : Device I2C address or SPI chip select number
6 - spi-max-frequency : Maximum SPI clocking speed of the device (for cyttsp-spi)
7 - interrupts : (gpio) interrupt to which the chip is connected
9 - bootloader-key : the 8-byte bootloader key that is required to switch
16 - reset-gpios : the reset gpio the chip is connected to
18 - touchscreen-size-x : horizontal resolution of touchscreen (in pixels)
19 - touchscreen-size-y : vertical resolution of touchscreen (in pixels)
20 - touchscreen-fuzz-x : horizontal noise value of the absolute input device
22 - touchscreen-fuzz-y : vertical noise value of the absolute input device
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dopen-pic.txt13 - compatible: Specifies the compatibility list for the PIC. The type
14 shall be <string> and the value shall include "open-pic".
16 - reg: Specifies the base physical address(s) and size(s) of this
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
19 - interrupt-controller: The presence of this property identifies the node
22 - #interrupt-cells: Specifies the number of cells needed to encode an
25 - #address-cells: Specifies the number of cells needed to encode an
27 'interrupt-map' nodes do not have to specify a parent unit address.
31 - pic-no-reset: The presence of this property indicates that the PIC
32 shall not be reset during runtime initialization. No property value shall
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/freebsd/sys/contrib/device-tree/Bindings/input/
H A Datmel,maxtouch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nick Dyer <nick@shmanahar.org>
11 - Linus Walleij <linus.walleij@linaro.org>
18 - $ref: input.yaml#
30 vdda-supply:
34 vdd-supply:
38 reset-gpios:
41 Optional GPIO specifier for the touchscreen's reset pin
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-8040-clearfog-gt-8k.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
17 "marvell,armada-ap806-qua
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