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/freebsd/sys/contrib/device-tree/Bindings/fpga/
H A Dfpga-region.txt1 FPGA Region Device Tree Binding
6 - Introduction
7 - Terminology
8 - Sequence
9 - FPGA Region
10 - Supported Use Models
11 - Device Tree Examples
12 - Constraints
39 Partial Reconfiguration Region (PR
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H A Dfpga-region.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/fpga/fpga-region.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: FPGA Region
10 - Michal Simek <michal.simek@amd.com>
14 - Introduction
15 - Terminology
16 - Sequence
17 - FPGA Region
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/freebsd/sys/dev/mvs/
H A Dmvs.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
42 #define IC_HC0 0x000001ff /* bits 0-8 = HC0 */
44 #define IC_HC1 (IC_HC0 << IC_HC_SHIFT) /* 9-17 = HC1 */
58 #define IC_MAIN_RSVD (0xfe000000) /* bits 31-25 */
59 #define IC_MAIN_RSVD_5 (0xfff10000) /* bits 31-19 */
60 #define IC_MAIN_RSVD_SOC (0xfffffec0) /* bits 31-9, 7-6 */
65 #define CHIP_SOC_HC0_MASK(num) (0xff >> ((4 - (num)) * 2))
87 #define HC_RQOP 0x4 /* Request Queue Out-Pointer */
88 #define HC_RQIP 0x8 /* Response Queue In-Pointer */
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/freebsd/sys/conf/
H A DNOTES2 # NOTES -- Lines that can be cut/pasted into kernel and hints configs.
11 # Please use ``make LINT'' to create an old-style LINT file if you want to
12 # do kernel test-builds.
48 # auto-size based on physical memory.
66 # after most other flags. Here we use it to inhibit use of non-optimal
67 # gcc built-in functions (e.g., memcmp).
70 # The following is equivalent to 'config -g KERNELNAME' and creates
71 # 'kernel.debug' compiled with -g debugging as well as a normal
81 makeoptions CONF_CFLAGS=-fno-builtin #Don't allow use of memcmp, etc.
82 #makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols
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/freebsd/sys/dev/cxgbe/common/
H A Dt4_hw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
49 * t4_wait_op_done_val - wait until an operation is completed
52 * @mask: a single-bit field within @reg that indicates completion
61 * operation completes and -EAGAIN otherwise.
74 if (--attempts == 0) in t4_wait_op_done_val()
75 return -EAGAIN; in t4_wait_op_done_val()
89 * t4_set_reg_field - set a register field to a value
108 * t4_read_indirect - read indirectly addressed registers
123 while (nregs--) { in t4_read_indirect()
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/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/
H A Dtsan_interceptors_posix.cpp1 //===-- tsan_interceptors_posix.cpp ---------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
50 (((__sanitizer_FILE *)fp)->_file == -1 \
51 ? -1 \
52 : (int)(unsigned short)(((__sanitizer_FILE *)fp)->_file))
138 const int SI_TIMER = -2;
140 void *const MAP_FAILED = (void*)-1;
144 const int PTHREAD_BARRIER_SERIAL_THREAD = -1;
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/freebsd/contrib/wpa/src/drivers/
H A Dnl80211_copy.h6 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>
13 * Copyright 2015-2017 Intel Deutschland GmbH
14 * Copyright (C) 2018-2023 Intel Corporation
32 * be careful not to break things - i.e. don't move anything around or so
74 * - a setup station entry is added, not yet authorized, without any rate
76 * - when the TDLS setup is done, a single NL80211_CMD_SET_STATION is valid
79 * - %NL80211_TDLS_ENABLE_LINK is then used
80 * - after this, the only valid operation is to remove it by tearing down
95 * Frame registration is done on a per-interface basis and registrations
137 * software, like the AP-VLAN type in mac80211 for example, there's
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
128 … (0x1<<23) // Fast back-to-back capable. Not ap…
145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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/freebsd/sys/dev/bce/
H A Dif_bce.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2006-2014 QLogic Corporation
42 * BCM5706C A0, A1 (pre-production)
43 * BCM5706S A0, A1 (pre-production)
44 * BCM5708C A0, B0 (pre-production)
45 * BCM5708S A0, B0 (pre-production)
46 * BCM5709C A0 B0, B1, B2 (pre-production)
47 * BCM5709S A0, B0, B1, B2 (pre-production)
153 "QLogic NetXtreme II BCM5706 1000Base-T" },
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
93 I->addAnnotationMetadata("auto-init"); in initializeAlloca()
96 /// getBuiltinLibFunction - Given a builtin id for a function like
106 // TODO: This list should be expanded or refactored after all GCC-compatible in getBuiltinLibFunction()
134 // The AIX library functions frexpl, ldexpl, and modfl are for 128-bit in getBuiltinLibFunction()
136 // if it is 64-bit 'long double' mode. in getBuiltinLibFunction()
146 if (FD->hasAttr<AsmLabelAttr>()) in getBuiltinLibFunction()
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