| /freebsd/sys/contrib/device-tree/src/arm/ti/keystone/ |
| H A D | keystone-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
9 #address-cells = <1>;
10 #size-cells = <1>;
14 #clock-cells = <0>;
15 compatible = "ti,keystone,pll-mux-clock";
18 bit-shift = <23>;
19 bit-mask = <1>;
20 clock-output-names = "mainmuxclk";
24 #clock-cells = <0>;
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| /freebsd/sys/contrib/device-tree/Bindings/input/ |
| H A D | azoteq,iqs7222.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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| H A D | iqs269a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jef
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| H A D | iqs626a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
31 "#address-cells":
34 "#size-cells":
37 azoteq,suspend-mode:
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| /freebsd/contrib/ntp/html/drivers/ |
| H A D | driver38.html | 1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
6 <meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
14 <!-- #BeginDate format:En2m -->21-Oct-2010 23:44<!-- #EndDate -->
24 <div align="right">
25 <tt>Address: </tt></div>
31 <div align="right">
32 <tt>Reference ID: </tt></div>
38 <div align="right">
39 <tt>Driver ID: </tt></div>
45 <div align="right">
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| H A D | driver29.html | 1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
6 <meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
14 <!-- #BeginDate format:En2m -->13-Sep-2019 08:07<!-- #EndDate -->
32 <div align="right">
33 <tt>Address: </tt></div>
39 <div align="right">
40 <tt>Reference ID:</tt></div>
46 <div align="right">
47 <tt>Driver ID:</tt></div>
53 <div align="right">
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| H A D | driver40.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
6 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
8 <meta http-equiv="Content-Style-Type" content="text/css">
9 <meta http-equiv="Content-Script-Type" content="text/javascript">
11 <link rev="made" href="http://www.bea.hi-ho.ne.jp/abetakao/">
19 <!-- #BeginDate format:En2m -->12-Oct-2017 09:05<!-- #EndDate -->
20 …p; <a href="driver40.html">ENGLISH</a> <a href="driver40-ja.html">JAPANESE</a>…
24 Reference ID: <code>JJY</code><br>
32 <td width="50%" style="vertical-align:top;">
33 <a href="#mode-1">Tristate Ltd. TS-JJY01, TS-JJY02</a><br>
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| /freebsd/sys/contrib/device-tree/Bindings/iio/frequency/ |
| H A D | adf4350.txt | 4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
10 ADF435x Reference Clock (CLKIN).
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
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| H A D | adi,adf4350.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
26 description: Clock to provide CLKIN reference clock signal.
28 clock-names:
35 adi,channel-spacing:
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| /freebsd/contrib/ntp/html/ |
| H A D | discipline.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
7 <!-- Changed by: stenn, 03-Jan-2020 -->
13 <!-- #BeginDate format:En2m -->3-Jan-2020 02:12<!-- #EndDate -->
18 <li class="inline"><a href="#pll">Phase-Lock Loop Operations</a></li>
24 …reference implementation is the clock discipline algorithm, which is best described as an adaptive…
25 <div align="center"> <img src="pic/discipline.gif" alt="gif">
27 </div>
29 …reference clock or remote server is compared with the timestamp of the system clock, represented a…
33 …reference implementation, time constants and poll intervals are expressed as exponents of 2. By c…
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| H A D | stats.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
12 <!-- #BeginDate format:En2m -->26-Jul-2015 06:29<!-- #EndDate -->
26 <p>This page describes several statistics provided in the NTP specification and reference implement…
29 …<li>Roundtrip system and network delay measured by the on-wire protocol. This is call <em>roundtri…
34 <div align="center">
37 </div>
38 …he server. The data represented in boxes labeled Peer are computed by the on-wire protocol, as des…
40 …acterized by the offset θ and delay δ samples measured by the on-wire protocol, as des…
45 …il the source is no longer reachable. Reachability is determined by an eight-bit shift register, w…
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| /freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm63138.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
10 #address-cells = <1>;
11 #size-cell
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| /freebsd/sys/contrib/device-tree/src/arm/st/ |
| H A D | ste-nomadik-stn8815.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
18 L2: cache-controller {
19 compatible = "arm,l210-cache";
21 interrupt-paren
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| /freebsd/contrib/expat/doc/ |
| H A D | reference.html | 1 <?xml version="1.0" encoding="iso-8859-1"?>
2 <!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN"
3 "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
6 <!--
15 Copyright (c) 2000-2004 Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
16 Copyright (c) 2002-2012 Karl Waclawek <karl@waclawek.net>
17 Copyright (c) 2017-2024 Sebastian Pipping <sebastian@pipping.org>
20 Copyright (c) 2021 Nicolas Cavallari <nicolas.cavallari@green-communication
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| /freebsd/sys/arm/freescale/vybrid/ |
| H A D | vf_sai.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 * Chapter 51, Vybrid Reference Manual, Rev. 5, 07/2013
110 uint32_t div; /* Bit Clock Divide. Division value is (div + 1) * 2. */ member
111 uint32_t mfi; /* PLL4 Multiplication Factor Integer */
112 uint32_t mfn; /* PLL4 Multiplication Factor Numerator */
113 uint32_t mfd; /* PLL4 Multiplication Factor Denominator */
118 * (div + 1) * 2 = MCLK/(nch * LRCLK * bits/1000000),
120 * MCLK - master clock
121 * nch - number of channels
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| /freebsd/sys/arm/freescale/imx/ |
| H A D | imx6_ssi.c | 1 /*-
30 * Chapter 61, i.MX 6Dual/6Quad Applications Processor Reference Manual,
60 bus_space_read_4(_sc->bst, _sc->bsh, _reg)
62 bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
137 uint32_t mfi; /* PLL4 Multiplication Factor Integer */
138 uint32_t mfn; /* PLL4 Multiplication Factor Numerator */
139 uint32_t mfd; /* PLL4 Multiplication Factor Denominator */
156 * Fref ------/ | | | | | | | | | |
157 * PLL4 div select -/ | | | | | | | | |
158 * PLL4 num --------------/ | | | | | | | |
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| /freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300_eeprom.c | 91 AH9300(ah)->calibration_data_source = source; in ar9300_calibration_data_set()
100 return AH9300(ah)->calibration_data_source; in ar9300_calibration_data_get()
114 AH9300(ah)->calibration_data_source_address = size; in ar9300_calibration_data_address_set()
123 return AH9300(ah)->calibration_data_source_address; in ar9300_calibration_data_address_get()
150 mptr = &ahp->ah_eeprom; in ar9300_eeprom_template_install()
163 return -1; in ar9300_eeprom_template_install()
174 nptr = -1; in ar9300_eeprom_restore_something()
180 AH9300(ah)->calibration_data_source = calibration_data_none; in ar9300_eeprom_restore_something()
181 AH9300(ah)->calibration_data_source_address = 0; in ar9300_eeprom_restore_something()
194 AH9300(ah)->calibration_data_source = calibration_data_none; in ar9300_eeprom_restore_something()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfo.h | 1 //===- TargetTransformInfo.h ------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 /// This pass exposes codegen information to IR-level passes. Every
11 /// 1. The IR-level analysis pass.
12 /// 2. The IR-level transformation interface which provides the needed
14 /// 3. Codegen-level implementation which uses target-specific hooks.
16 /// This file defines #2, which is the interface that IR-level transformations
19 //===----------------------------------------------------------------------===//
75 /// If this is non-null, then analysis/optimization passes can assume that
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Instructions.cpp | 1 //===- Instructions.cpp - Implement the LLVM instructions -----------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements all of the non-inline methods for the LLVM instruction
12 //===----------------------------------------------------------------------===//
54 "disable-i2p-p2i-opt", cl::init(false),
57 //===----------------------------------------------------------------------===//
59 //===----------------------------------------------------------------------===//
70 checkedMulUnsigned(Size.getKnownMinValue(), C->getZExtValue()); in getAllocationSize()
83 auto CheckedProd = checkedMulUnsigned(Size->getKnownMinValue(), in getAllocationSizeInBits()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1 //===- llvm/CodeGen/TargetLowering.h - Target Lowering Info -----*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
20 //===----------------------------------------------------------------------===//
128 bool MemcpyStrSrc; // Indicates whether the memcpy source is an in-register
193 /// This base class for TargetLowering contains the SelectionDAG-independent
215 TypeScalarizeVector, // Replace this one-element vector with its element.
224 // vector, this is non-trivial at SelectionDAG
230 /// in order to type-legalize it.
256 // floating-point to integer type.
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorize.cpp | 1 //===- LoopVectorize.cpp - A Loop Vectorizer ------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // and generates target-independent LLVM-IR.
20 // 2. LoopVectorizationLegality - A unit that checks for the legality
22 // 3. InnerLoopVectorizer - A unit that performs the actual
24 // 4. LoopVectorizationCostModel - A unit that checks for the profitability
31 // http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html). For this
32 // purpose, we temporarily introduced the VPlan-native vectorization path: an
36 //===----------------------------------------------------------------------===//
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| H A D | VectorCombine.cpp | 1 //===------- VectorCombine.cpp - Optimize partial vector operations -------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // transforms implemented here may not fit in traditional loop-based or SLP
13 //===----------------------------------------------------------------------===//
37 #define DEBUG_TYPE "vector-combine"
52 "disable-vector-combine", cl::init(false), cl::Hidden,
56 "disable-binop-extract-shuffle", cl::init(false), cl::Hidden,
60 "vector-combine-max-scan-instrs", cl::init(30), cl::Hidden,
91 // TODO: Direct calls from the top-level "run" loop use a plain "Instruction"
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LoopStrengthReduce.cpp | 1 //===- LoopStrengthReduce.cpp - Strength Reduce IVs in Loops --------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
15 // rewrites expressions to take advantage of scaled-index addressing modes
19 // Terminology note: this code has a lot of handling for "post-increment" or
20 // "post-inc" users. This is not talking about post-increment addressing modes;
31 // example, the icmp is a post-increment user, since it uses %i.next, which is
33 // case of post-increment users is users outside the loop.
47 // we may not actually need both reg and (-1 * reg) in registers; the
53 //===----------------------------------------------------------------------===//
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1 //===- ARMISelLowering.cpp - ARM DAG Lowering Implementation --------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
122 #define DEBUG_TYPE "arm-isel"
131 ARMInterworking("arm-interworking", cl::Hidden,
136 "arm-promote-constant", cl::Hidden,
141 "arm-promote-constant-max-size", cl::Hidden,
145 "arm-promote-constant-max-total", cl::Hidden,
150 MVEMaxSupportedInterleaveFactor("mve-max-interleave-factor", cl::Hidden,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1 //===-- AArch64ISelLowering.cpp - AArch64 DAG Lowering Implementation ----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
109 #define DEBUG_TYPE "aarch64-lower"
119 "aarch64-elf-ldtls-generation", cl::Hidden,
124 EnableOptimizeLogicalImm("aarch64-enable-logical-imm", cl::Hidden,
134 EnableCombineMGatherIntrinsics("aarch64-enable-mgather-combine", cl::Hidden,
139 static cl::opt<bool> EnableExtToTBL("aarch64-enable-ext-to-tbl", cl::Hidden,
146 static cl::opt<unsigned> MaxXors("aarch64-max-xors", cl::init(16), cl::Hidden,
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|