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/linux/Documentation/devicetree/bindings/net/
H A Dintel,ixp4xx-hss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
30 - description: phandle to the NPE this HSS instance is using
31 - description: the NPE instance number
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H A Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
22 pattern: '^mdio(-(bus|external))?(@.+|-([0-9]+))?$'
24 "#address-cells":
27 "#size-cells":
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/linux/Documentation/devicetree/bindings/misc/
H A Dolpc,xo1.75-ec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/misc/olpc,xo1.75-ec.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: OLPC XO-1.75 Embedded Controller
12 on a OLPC XO-1.75 laptop computer.
16 response data) by strobing the ACK pin with the ready signal. See the
17 "ready-gpios" property of the SSP binding as documented in:
18 <Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml>.
21 - Lubomir Rintel <lkundrak@v3.sk>
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/linux/Documentation/devicetree/bindings/spi/
H A Dmarvell,mmp2-ssp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Lubomir Rintel <lkundrak@v3.sk>
16 - marvell,mmp2-ssp
17 - mrvl,ce4100-ssp
18 - mvrl,pxa168-ssp
19 - mrvl,pxa25x-ssp
20 - mvrl,pxa25x-nssp
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/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-linksys-nslu2.dts1 // SPDX-License-Identifier: ISC
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-status {
36 gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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/linux/Documentation/devicetree/bindings/iio/magnetometer/
H A Dasahi-kasei,ak8975.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/magnetometer/asahi-kasei,ak8975.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Albrieux <jonathan.albrieux@gmail.com>
15 - enum:
16 - asahi-kasei,ak8975
17 - asahi-kasei,ak8963
18 - asahi-kasei,ak09911
19 - asahi-kasei,ak09912
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/linux/Documentation/devicetree/bindings/mtd/
H A Dlpc32xx-slc.txt4 - compatible: "nxp,lpc3220-slc"
5 - reg: Address and size of the controller
6 - nand-on-flash-bbt: Use bad block table on flash
7 - gpios: GPIO specification for NAND write protect
11 - nxp,wdr-clks: Delay before Ready signal is tested on write (W_RDY)
12 - nxp,rdr-clks: Delay before Ready signal is tested on read (R_RDY)
15 - nxp,wwidth: Write pulse width (W_WIDTH)
16 - nxp,whold: Write hold time (W_HOLD)
17 - nxp,wsetup: Write setup time (W_SETUP)
18 - nxp,rwidth: Read pulse width (R_WIDTH)
[all …]
H A Draw-nand-chip.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: nand-chip.yaml#
21 The interpretation of these parameters is implementation-defined, so
28 pattern: "^nand@[a-f0-9]$"
32 Contains the chip-select IDs.
34 nand-ecc-placement:
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H A Dfsl-upm-nand.txt4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
21 read registers (tR). Required if property "gpios" is not used
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H A Datmel-nand.txt4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
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/linux/Documentation/devicetree/bindings/iio/proximity/
H A Dnicera,d3323aa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nicera D3-323-AA PIR sensor
10 - Waqar Hameed <waqar.hameed@axis.com>
14 Datasheet: https://www.endrich.com/Datenbl%C3%A4tter/Sensoren/D3-323-AA_e.pdf
20 vdd-supply:
24 vout-clk-gpios:
29 is ready for configuration (within 1.2 s).
31 data-gpios).
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/linux/Documentation/devicetree/bindings/fpga/
H A Dlattice,sysconfig.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Georgiev <v.georgiev@metrotek.ru>
23 - lattice,sysconfig-ecp5
28 program-gpios:
34 init-gpios:
37 Indicates that the FPGA is ready to be configured.
40 done-gpios:
47 - compatible
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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dmicrochip,mcp3911.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Marcus Folkesson <marcus.folkesson@gmail.com>
12 - Kent Gustavsson <nedo80@gmail.com>
21 - microchip,mcp3910
22 - microchip,mcp3911
23 - microchip,mcp3912
24 - microchip,mcp3913
25 - microchip,mcp3914
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H A Dadi,ad7768-1.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/adi,ad7768-1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD7768-1 ADC device driver
10 - Michael Hennerich <michael.hennerich@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf
18 const: adi,ad7768-1
26 clock-names:
29 trigger-sources:
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/linux/Documentation/devicetree/bindings/sound/
H A Drichtek,rt9123p.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
16 - $ref: dai-common.yaml#
21 - richtek,rt9123p
23 '#sound-dai-cells':
26 enable-gpios:
29 enable-delay-ms:
31 Delay time for 'ENABLE' pin changes intended to make I2S clocks ready to
[all …]
H A Dmaxim,max98357a.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tzung-Bi Shih <tzungbi@kernel.org>
13 Maxim Integrated MAX98357A/MAX98360A is a digital pulse-code modulation (PCM)
17 - $ref: dai-common.yaml#
22 - maxim,max98357a
23 - maxim,max98360a
25 '#sound-dai-cells':
28 sdmode-gpios:
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/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a-moxa-uc-8410a.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/
10 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
17 model = "Moxa UC-8410A";
18 compatible = "fsl,ls1021a-moxa-uc-8410a", "fsl,ls1021a";
26 sys_mclk: clock-mclk {
27 compatible = "fixed-clock";
28 #clock-cells = <0>;
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/linux/arch/arm/mach-pxa/
H A Dspitz.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Hardware specific definitions for SL-Cx000 series of PDAs
17 /* Spitz/Akita GPIOs */
48 /* Spitz Only GPIOs */
50 #define SPITZ_GPIO_CF2_IRQ (106) /* CF slot1 Ready */
88 /* Spitz Scoop Device (No. 1) GPIOs */
118 /* Spitz Scoop Device (No. 2) GPIOs */
150 /* Akita IO Expander GPIOs */
/linux/arch/arm/boot/dts/moxa/
H A Dmoxart-uc7112lx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* moxart-uc7112lx.dts - Device Tree file for MOXA UC-7112-LX
7 /dts-v1/;
11 model = "MOXA UC-7112-LX";
12 compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart";
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <12000000>;
28 compatible = "numonyx,js28f128", "cfi-flash";
30 bank-width = <2>;
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-ufispace-ncplite.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "ufispace,ncplite-bmc", "aspeed,ast2600";
18 stdout-path = &uart5;
27 iio-hwmon {
28 compatible = "iio-hwmon";
29 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
[all …]
H A Daspeed-bmc-ibm-system1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,system1-bmc", "aspeed,ast2600";
74 stdout-path = "uart5:115200n8";
82 reserved-memory {
83 #address-cells = <1>;
[all …]
H A Daspeed-bmc-ampere-mtjade.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-57 assigned to NVMe slot 0-7
24 * i2c bus 60-67 assigned to NVMe slot 8-15
36 * i2c bus 70-77 assigned to NVMe slot 16-23
48 * i2c bus 80-81 assigned to NVMe M2 slot 0-1
60 stdout-path = &uart5;
[all …]
/linux/arch/arm/boot/dts/gemini/
H A Dgemini-dlink-dir-685.dts2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
24 stdout-path = "uart0:19200n8";
28 compatible = "gpio-keys";
[all …]
/linux/drivers/tty/serial/
H A Dar933x_uart.c1 // SPDX-License-Identifier: GPL-2.0
3 * Atheros AR933X SoC built-in UART driver
31 #include <asm/mach-ath79/ar933x_uart.h>
35 #define DRIVER_NAME "ar933x-uart"
53 struct mctrl_gpios *gpios; member
60 return readl(up->port.membase + offset); in ar933x_uart_read()
66 writel(value, up->port.membase + offset); in ar933x_uart_write()
98 up->ier |= AR933X_UART_INT_TX_EMPTY; in ar933x_uart_start_tx_interrupt()
99 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); in ar933x_uart_start_tx_interrupt()
104 up->ier &= ~AR933X_UART_INT_TX_EMPTY; in ar933x_uart_stop_tx_interrupt()
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-a83t-cubietruck-plus.dts2 * Copyright 2015 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun8i-a83t.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
52 compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
60 stdout-path = "serial0:115200n8";
63 hdmi-connector {
64 compatible = "hdmi-connector";
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