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/linux/drivers/clk/baikal-t1/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Baikal-T1 Clocks Control Unit interface"
7 Clocks Control Unit is the core of Baikal-T1 SoC System Controller
12 configurable and fixed clock dividers. Enable this option to be able
13 to select Baikal-T1 CCU PLLs and Dividers drivers.
18 bool "Baikal-T1 CCU PLLs support"
22 Enable this to support the PLLs embedded into the Baikal-T1 SoC
31 bool "Baikal-T1 CCU Dividers support"
36 between AXI-bus and system devices coming from CCU PLLs of Baikal-T1
37 SoC. CCU dividers can be either configurable or with fixed divider,
[all …]
/linux/drivers/net/phy/mscc/
H A Dmscc_serdes.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
25 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in pll5g_detune()
39 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in pll5g_tune()
56 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in vsc85xx_sd6g_pll_cfg_wr()
85 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in vsc85xx_sd6g_common_cfg_wr()
99 /* configurable terms */ in vsc85xx_sd6g_des_cfg_wr()
109 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in vsc85xx_sd6g_des_cfg_wr()
125 /* configurable terms */ in vsc85xx_sd6g_ib_cfg0_wr()
134 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in vsc85xx_sd6g_ib_cfg0_wr()
151 /* configurable terms */ in vsc85xx_sd6g_ib_cfg1_wr()
[all …]
/linux/include/net/
H A Dnsh.h10 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
12 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
14 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
18 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
27 * discussion of MPLS-related forwarding requirements.
32 * example [I-D.ietf-sfc-oam-framework] for one approach).
34 * The O bit MUST be set for OAM packets and MUST NOT be set for non-OAM
39 * a configurable parameter to enable forwarding received SFC OAM
45 * prior to enabling this behavior. The configurable parameter MUST be
50 * configurable via the control plane; the configured initial value can
[all …]
/linux/drivers/usb/gadget/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
25 you can't connect a "to-the-host" connector to a peripheral.
44 For more information, see <http://www.linux-usb.org/gadget> and
56 Avoid enabling these messages, even if you're actively
[all …]
/linux/Documentation/driver-api/gpio/
H A Dintro.rst17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
32 firmware knowing how they're used).
36 - Output values are writable (high=1, low=0). Some chips also have
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
44 input de-glitch/debounce logic, sometimes with software controls.
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/linux/Documentation/devicetree/bindings/net/can/
H A Dbosch,m_can.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Chandrasekar Ramakrishnan <rcsekar@samsung.com>
15 - $ref: can-controller.yaml#
23 - description: M_CAN registers map
24 - description: message RAM
26 reg-names:
28 - const: m_can
29 - const: message_ram
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/linux/Documentation/admin-guide/mm/
H A Dnommu-mmap.rst2 No-MMU memory mapping support
5 The kernel has limited support for memory mapping under no-MMU conditions, such
16 The behaviour is similar between the MMU and no-MMU cases, but not identical;
21 In the MMU case: VM regions backed by arbitrary pages; copy-on-write
24 In the no-MMU case: VM regions backed by arbitrary contiguous runs of
29 These behave very much like private mappings, except that they're
31 the no-MMU case doesn't support these, behaviour is identical to
39 In the no-MMU case:
41 - If one exists, the kernel will re-use an existing mapping to the
45 - If possible, the file mapping will be directly on the backing device
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/linux/drivers/usb/musb/
H A Dmusb_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2005-2006 by Texas Instruments
7 * Copyright (C) 2006-2007 Nokia Corporation
13 #define MUSB_EP0_FIFOSIZE 64 /* This is non-configurable */
74 /* Allocate for double-packet buffering (effectively doubles assigned _SIZE) */
121 #define MUSB_CONFIGDATA_HBRXE 0x10 /* HB-ISO for RX */
122 #define MUSB_CONFIGDATA_HBTXE 0x08 /* HB-ISO for TX */
202 #define MUSB_FADDR 0x00 /* 8-bit */
203 #define MUSB_POWER 0x01 /* 8-bit */
205 #define MUSB_INTRTX 0x02 /* 16-bit */
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/linux/drivers/pwm/
H A Dpwm-atmel-hlcdc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
11 #include <linux/mfd/atmel-hlcdc.h>
45 struct atmel_hlcdc *hlcdc = atmel->hlcdc; in atmel_hlcdc_pwm_apply()
49 if (state->enabled) { in atmel_hlcdc_pwm_apply()
50 struct clk *new_clk = hlcdc->slow_clk; in atmel_hlcdc_pwm_apply()
51 u64 pwmcval = state->duty_cycle * 256; in atmel_hlcdc_pwm_apply()
57 if (!atmel->errata || !atmel->errata->slow_clk_erratum) { in atmel_hlcdc_pwm_apply()
60 return -EINVAL; in atmel_hlcdc_pwm_apply()
67 if ((atmel->errata && atmel->errata->slow_clk_erratum) || in atmel_hlcdc_pwm_apply()
[all …]
H A Dpwm-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer PWM driver
9 * Inspired by Gerald Baeza's pwm-stm32 driver
13 #include <linux/mfd/stm32-lptimer.h>
31 /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */
41 if (!priv->num_cc_chans) in stm32_pwm_lp_update_allowed()
44 ret = regmap_read(priv->regmap, STM32_LPTIM_CCMR1, &ccmr1); in stm32_pwm_lp_update_allowed()
71 if (!priv->num_cc_chans) in stm32_pwm_lp_compare_channel_apply()
74 ret = regmap_read(priv->regmap, STM32_LPTIM_CCMR1, &ccmr1); in stm32_pwm_lp_compare_channel_apply()
79 /* Must disable CC channel (CCxE) to modify polarity (CCxP), then re-enable */ in stm32_pwm_lp_compare_channel_apply()
[all …]
/linux/Documentation/networking/dsa/
H A Dbcm_sf2.rst8 - xDSL gateways such as BCM63138
9 - streaming/multimedia Set Top Box such as BCM7445
10 - Cable Modem/residential gateways such as BCM7145/BCM3390
13 ports, offering a range of built-in and customizable interfaces:
15 - single integrated Gigabit PHY
16 - quad integrated Gigabit PHY
17 - quad external Gigabit PHY w/ MDIO multiplexer
18 - integrated MoCA PHY
19 - several external MII/RevMII/GMII/RGMII interfaces
22 fail-over not to lose packets during a MoCA role re-election, as well as out of
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/linux/net/netfilter/
H A Dnf_conntrack_sane.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * http://www.sane-project.org/html/doc015.html
11 * (C) 1999-2001 Paul `Rusty' Russell
12 * (C) 2002-2004 Netfilter Core Team <coreteam@netfilter.org>
13 * (C) 2003,2004 USAGI/WIDE Project <http://www.linux-ipv6.org>
88 dataoff = protoff + th->doff * 4; in help()
89 if (dataoff >= skb->len) in help()
92 datalen = skb->len - dataoff; in help()
103 if (req->RPC_code != htonl(SANE_NET_START)) { in help()
105 WRITE_ONCE(ct_sane_info->state, SANE_STATE_NORMAL); in help()
[all …]
H A Dnf_conntrack_ftp.c1 // SPDX-License-Identifier: GPL-2.0-only
4 /* (C) 1999-2001 Paul `Rusty' Russell
5 * (C) 2002-2004 Netfilter Core Team <coreteam@netfilter.org>
6 * (C) 2003,2004 USAGI/WIDE Project <http://www.linux-ipv6.org>
7 * (C) 2006-2012 Patrick McHardy <kaber@trash.net>
75 .plen = sizeof("PORT") - 1,
83 .plen = sizeof("EPRT") - 1,
93 .plen = sizeof("227 ") - 1,
99 .plen = sizeof("229 ") - 1,
114 return (int)(end - src); in get_ipv6_addr()
[all …]
/linux/kernel/
H A Dprofile.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Simple profiling. Manages a direct-mapped profile hit count buffer,
5 * with configurable resolution, support for restricting the cpus on
13 * Amortized hit count accounting via per-cpu open-addressed hashtables
64 prof_shift = clamp(par, 0, BITS_PER_LONG - 1); in profile_setup()
74 prof_shift = clamp(par, 0, BITS_PER_LONG - 1); in profile_setup()
91 prof_len = (_etext - _stext) >> prof_shift; in profile_init()
96 return -EINVAL; in profile_init()
114 return -ENOMEM; in profile_init()
120 pc = ((unsigned long)__pc - (unsigned long)_stext) >> prof_shift; in do_profile_hits()
[all …]
/linux/drivers/clk/renesas/
H A Dclk-r8a7740.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
90 /* PLLC0/1 are configurable multiplier clocks. Register them as in r8a7740_cpg_register_clock()
118 for (c = div4_clks; c->name; c++) { in r8a7740_cpg_register_clock()
119 if (!strcmp(name, c->name)) { in r8a7740_cpg_register_clock()
122 reg = c->reg; in r8a7740_cpg_register_clock()
123 shift = c->shift; in r8a7740_cpg_register_clock()
127 if (!c->name) in r8a7740_cpg_register_clock()
128 return ERR_PTR(-EINVAL); in r8a7740_cpg_register_clock()
137 table, &cpg->lock); in r8a7740_cpg_register_clock()
[all …]
H A Dclk-r8a73a4.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
87 /* PLL0/1 are configurable multiplier clocks. Register them as in r8a73a4_cpg_register_clock()
120 return ERR_PTR(-EINVAL); in r8a73a4_cpg_register_clock()
145 return ERR_PTR(-EINVAL); in r8a73a4_cpg_register_clock()
158 mult = 0x20 - ((readl(base + CPG_FRQCRC) >> shift) & 0x1f); in r8a73a4_cpg_register_clock()
162 for (c = div4_clks; c->name; c++) { in r8a73a4_cpg_register_clock()
163 if (!strcmp(name, c->name)) in r8a73a4_cpg_register_clock()
166 if (!c->name) in r8a73a4_cpg_register_clock()
167 return ERR_PTR(-EINVAL); in r8a73a4_cpg_register_clock()
[all …]
/linux/drivers/block/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
28 <file:Documentation/admin-guide/blockdev/floppy.rst>.
41 special low-level hardware accesses to them (access and use
42 non-standard formats, for example), then enable this.
64 If you have a SWIM-3 (Super Woz Integrated Machine 3; from Apple)
95 tristate "SEGA Dreamcast GD-ROM drive"
100 "GD-ROM" by SEGA to signify it is capable of reading special disks
114 The User-Mode Linux port includes a driver called UBD which will let
124 host's disk; this may cause problems if, for example, the User-Mode
129 immediately) is configurable on a per-UBD basis by using a special
[all …]
/linux/Documentation/core-api/
H A Dgenericirq.rst7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
29 __do_IRQ() super-handler, which is able to deal with every type of
36 - Level type
38 - Edge type
40 - Simple type
44 - Fast EOI type
46 In the SMP world of the __do_IRQ() super-handler another type was
49 - Per CPU type
51 This split implementation of high-level IRQ handlers allows us to
[all …]
/linux/drivers/iio/adc/
H A Dmax9611.c1 // SPDX-License-Identifier: GPL-2.0
6 * 12-bit ADC interface.
12 * This driver supports input common-mode voltage, current-sense
16 * Op-amp, analog comparator, and watchdog functionalities are not
57 * (((adc_read >> 4) - offset) / ((1 / LSB) * 10^-3)
71 * (((adc_read >> 4) * 1000) - offset) / (1 / 14 * 1000)
113 * max9611_mux_conf - associate ADC mux configuration with register address
136 * max9611_csa_gain_conf - associate gain multiplier with LSB and
139 * Group together parameters associated with configurable gain
194 * max9611_read_single() - read a single value from ADC interface
[all …]
/linux/Documentation/admin-guide/blockdev/
H A Dzoned_loop.rst1 .. SPDX-License-Identifier: GPL-2.0
16 -----------
23 Using zloop, zoned block devices with a configurable capacity, zone size and
47 --------------------------
50 character device file /dev/zloop-control can be used to add a zloop device.
51 This is done by writing an "add" command directly to the /dev/zloop-control
55 $ ls -l /dev/zloop*
56 crw-------. 1 root root 10, 123 Jan 6 19:18 /dev/zloop-control
58 $ mkdir -p <base directory/<device ID>
59 $ echo "add [options]" > /dev/zloop-control
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/linux/Documentation/virt/kvm/x86/
H A Dintel-tdx.rst1 .. SPDX-License-Identifier: GPL-2.0
10 host and physical attacks. A CPU-attested software module called 'the TDX
16 This documentation describes TDX-specific KVM ABIs. The TDX module needs to be
18 core-kernel provides the support of initializing the TDX module, which is
25 ---------------------
28 For TDX operations, KVM_MEMORY_ENCRYPT_OP is re-purposed to be generic
29 ioctl with TDX specific sub-ioctl() commands.
33 /* Trust Domain Extensions sub-ioctl() commands. */
48 /* flags for sub-command. If sub-command doesn't use this, set zero. */
51 * data for each sub-command. An immediate or a pointer to the actual
[all …]
/linux/Documentation/admin-guide/device-mapper/
H A Dcache.rst8 dm-cache is a device mapper target written by Joe Thornber, Heinz
15 This device-mapper solution allows us to insert this caching at
17 a thin-provisioning pool. Caching solutions that are integrated more
20 The target reuses the metadata library used in the thin-provisioning
23 The decision as to what data to migrate and when is left to a plug-in
46 Sub-devices
47 -----------
52 1. An origin device - the big, slow one.
54 2. A cache device - the small, fast one.
56 3. A small metadata device - records which blocks are in the cache,
[all …]
/linux/Documentation/fb/
H A Duvesafb.rst2 uvesafb - A Generic Driver for VBE2+ compliant video cards
6 ---------------
30 --------------------------
36 - Lack of any type of acceleration.
37 - A strict and limited set of supported video modes. Often the native
42 ratio, which is what most BIOS-es are limited to.
43 - Adjusting the refresh rate is only possible with a VBE 3.0 compliant
44 Video BIOS. Note that many nVidia Video BIOS-es claim to be VBE 3.0
48 ----------------
54 video=uvesafb:1024x768-32,mtrr:3,ywrap (compiled into the kernel)
[all …]
/linux/sound/soc/tegra/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
5 tristate "SoC Audio for the Tegra System-on-Chip"
85 Config to enable the Inter-IC Sound (I2S) Controller which
86 implements full-duplex and bidirectional and single direction
87 point-to-point serial interfaces. It can interface with I2S
116 converts the multi-bit Pulse Code Modulation (PCM) audio input to
117 oversampled 1-bit Pulse Density Modulation (PDM) output. From the
119 that up-samples the input to the desired sampling rate by
121 the desired 1-bit output via Delta Sigma Modulation (DSM).
132 channel. Buffer size is configurable for each ADMAIIF channel.
[all …]
/linux/drivers/cpufreq/
H A Dgx-suspmod.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * (C) 2002 Hiroshi Miura <miura@da-cha.org>
10 * software is provided AS-IS with no warranties.
19 * Suspend Modulation works by asserting and de-asserting the SUSP# pin
20 * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
24 * Suspend Modulation's OFF/ON duration are configurable
28 * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
35 * F_eff = Fgx * ----------------------
43 * on_duration = off_duration * (stock_freq - freq) / freq
46 * on_duration = DURATION - off_duration
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