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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dintel,ixp4xx-hss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
15 Processing Engine) and the IXP4xx Queue Manager to process
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
30 - description: phandle to the NPE this HSS instance is using
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/illumos-gate/usr/src/uts/sun4v/io/
H A Dldc.c118 /* Pkt processing internal functions */
139 #define ACKPEEK_HEAD_INVALID ((uint64_t)-1)
163 * the LDC Tx queue. The number of Tx queue entries is
169 * The minimum queue length. This is the size of the smallest
170 * LDC queue. If the computed value is less than this default,
171 * the queue length is rounded up to 'ldc_queue_entries'.
176 * The length of the reliable-mode data queue in terms of the LDC
177 * receive queue length. i.e., the number of times larger than the
178 * LDC receive queue that the data queue should be. The HV receive
179 * queue is required to be a power of 2 and this implementation
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/freebsd/sys/contrib/device-tree/src/arm/intel/ixp/
H A Dintel-ixp42x-goramo-multilink.dts1 // SPDX-License-Identifier: ISC
5 * - MultiLink Basic (a box)
6 * - MultiLink Max (19" rack mount)
9 * This is one of the few devices supporting the IXP4xx High-Speed Serial
14 /dts-v1/;
16 #include "intel-ixp42x.dtsi"
17 #include <dt-bindings/input/input.h>
21 compatible = "goramo,multilink-router", "intel,ixp42x";
22 #address-cell
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/freebsd/sys/dev/gve/
H A Dgve_tx_dqo.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
38 gve_unmap_packet(struct gve_tx_ring *tx, in gve_unmap_packet() argument
41 bus_dmamap_sync(tx->dqo.buf_dmatag, pending_pkt->dmamap, in gve_unmap_packet()
43 bus_dmamap_unload(tx->dqo.buf_dmatag, pending_pkt->dmamap); in gve_unmap_packet()
49 pending_pkt->qpl_buf_head = -1; in gve_clear_qpl_pending_pkt()
50 pending_pkt->num_qpl_bufs = 0; in gve_clear_qpl_pending_pkt()
54 gve_free_tx_mbufs_dqo(struct gve_tx_ring *tx) in gve_free_tx_mbufs_dqo() argument
59 for (i = 0; i < tx->dqo.num_pending_pkts; i++) { in gve_free_tx_mbufs_dqo()
60 pending_pkt = &tx->dqo.pending_pkts[i]; in gve_free_tx_mbufs_dqo()
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/freebsd/sys/dev/e1000/
H A De1000_regs.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
38 #define E1000_CTRL 0x00000 /* Device Control - RW */
39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */
40 #define E1000_STATUS 0x00008 /* Device Status - RO */
41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
44 #define E1000_FLA 0x0001C /* Flash Access - RW */
45 #define E1000_MDIC 0x00020 /* MDI Control - RW */
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H A De1000_82575.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
46 * These entries are also used for MAC-based filtering.
193 #define E1000_RXDADV_STAT_TS 0x10000 /* Pkt was time stamped */
226 #define E1000_RXDADV_PKTTYPE_ETQF_SHIFT 4 /* Right-shift 4 bits */
250 #define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
252 #define E1000_ADVTXD_MAC_LINKSEC 0x00040000 /* Apply LinkSec on pkt */
253 #define E1000_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp pkt */
259 /* 1st & Last TSO-full iSCSI PDU*/
265 #define E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */
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/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_regs.h3 Copyright (c) 2001-2015, Intel Corporation
38 #define E1000_CTRL 0x00000 /* Device Control - RW */
39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */
40 #define E1000_STATUS 0x00008 /* Device Status - RO */
41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
44 #define E1000_FLA 0x0001C /* Flash Access - RW */
45 #define E1000_MDIC 0x00020 /* MDI Control - RW */
46 #define E1000_MDICNFG 0x00E04 /* MDI Config - RW */
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H A De1000_82575.h3 Copyright (c) 2001-2015, Intel Corporation
46 * These entries are also used for MAC-based filtering.
193 /* Receive Descriptor - Advanced */
204 __le16 pkt_info; /*RSS type, Pkt type*/
231 #define E1000_RXDADV_STAT_TS 0x10000 /* Pkt was time stamped */
265 #define E1000_RXDADV_PKTTYPE_ETQF_SHIFT 4 /* Right-shift 4 bits */
281 /* Transmit Descriptor - Advanced */
303 #define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
305 #define E1000_ADVTXD_MAC_LINKSEC 0x00040000 /* Apply LinkSec on pkt */
306 #define E1000_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp pkt */
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/freebsd/sys/contrib/dev/iwlwifi/mvm/
H A Dtx.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
14 #include "iwl-trans.h"
15 #include "iwl-nvm-utils.h"
16 #include "iwl-utils.h"
19 #include "time-sync.h"
28 trig = iwl_fw_dbg_trigger_on(&mvm->fwrt, NULL, FW_DBG_TRIGGER_BA); in iwl_mvm_bar_check_trigger()
32 ba_trig = (void *)trig->data; in iwl_mvm_bar_check_trigger()
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/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/emlxs/
H A Demlxs_fcp.c23 * Copyright (c) 2004-2012 Emulex. All rights reserved.
34 PADDR(icmd->un.cont64[i].addrHigh, icmd->un.cont64[i].addrLow));
58 fc_packet_t *pkt = NULL; in emlxs_handle_fcp_event() local
79 cmd = &iocbq->iocb; in emlxs_handle_fcp_event()
82 iostat = cmd->ULPSTATUS; in emlxs_handle_fcp_event()
93 sbp = (emlxs_buf_t *)iocbq->sbp; in emlxs_handle_fcp_event()
100 "cmd=%x iotag=%d", cmd->ULPCOMMAND, cmd->ULPIOTAG); in emlxs_handle_fcp_event()
111 pkt = PRIV2PKT(sbp); in emlxs_handle_fcp_event()
113 did = LE_SWAP24_LO(pkt->pkt_cmd_fhdr.d_id); in emlxs_handle_fcp_event()
114 scsi_cmd = (uint8_t *)pkt->pkt_cmd; in emlxs_handle_fcp_event()
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/freebsd/sys/contrib/device-tree/Bindings/firmware/
H A Dintel,ixp4xx-network-processing-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
24 - items:
25 - const: intel,ixp4xx-network-processing-engine
29 - description: NPE0 (NPE-A) register range
30 - description: NPE1 (NPE-B) register range
31 - description: NPE2 (NPE-C) register range
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/illumos-gate/usr/src/uts/common/io/e1000g/
H A De1000g_sw.h9 * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
40 * This header file contains Software-related data structures *
91 #define LAST_RAR_ENTRY (E1000_RAR_ENTRIES - 1)
261 * 82544 Workaround : Co-existence
287 /* Defines for Tx stall check */
313 * Tx descriptor LENGTH field mask
318 ((((struct ether_vlan_header *)(uintptr_t)ptr)->ether_tpid) == \
322 * QUEUE_INIT_LIST -- Macro which will init ialize a queue to NULL.
325 (_LH)->Flink = (_LH)->Blink = (PSINGLE_LIST_LINK)0
328 * IS_QUEUE_EMPTY -- Macro which checks to see if a queue is empty.
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/freebsd/sys/contrib/dev/iwlwifi/mld/
H A Dtx.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
14 * struct iwl_mld_txq - TX Queue data
18 * @status.allocated: Indicates that the queue was allocated.
19 * @status.stop_full: Indicates that the queue is full and should stop TXing.
21 * @tx_request: makes sure that if there are multiple threads that want to tx
41 INIT_LIST_HEAD(&mld_txq->list); in iwl_mld_init_txq()
42 atomic_set(&mld_txq->tx_request, 0); in iwl_mld_init_txq()
48 return (void *)txq->drv_priv; in iwl_mld_txq_from_mac80211()
58 struct iwl_rx_packet *pkt);
67 struct iwl_rx_packet *pkt);
H A Dnotif.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2024-2025 Intel Corporation
11 #include "iwl-trans.h"
15 #include "fw/api/mac-cfg.h"
16 #include "session-protect.h"
17 #include "fw/api/time-event.h"
18 #include "fw/api/tx.h"
27 #include "tx.h"
37 #include "ftm-initiator.h"
70 struct iwl_rx_packet *pkt, \
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H A Dtx.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2024 - 2025 Intel Corporation
7 #include "tx.h"
10 #include "iwl-utils.h"
15 #include "fw/api/tx.h"
19 #include "fw/api/time-event.h"
23 /* Toggles between TX antennas. Receives the bitmask of valid TX antennas and
24 * the *index* used for the last TX, and returns the next valid *index* to use.
50 struct ieee80211_sta *sta = txq->sta; in iwl_mld_get_queue_size()
55 lockdep_assert_wiphy(mld->wiphy); in iwl_mld_get_queue_size()
[all …]
/illumos-gate/usr/src/uts/sun4v/sys/
H A Dldc_impl.h41 /* Define LDC Queue info */
50 * LDC Reliable mode - initial packet seqid
51 * - If peer initiated handshake, RDX should contain init_seqid + 1
52 * - If this endpoint initiated handshake first data packet should
58 #define LDC_CTRL 0x01 /* Control Pkt */
59 #define LDC_DATA 0x02 /* Data Pkt */
60 #define LDC_ERR 0x10 /* Error Pkt */
63 #define LDC_INFO 0x01 /* Control/Data/Error info pkt */
76 #define TS_TXQ_RDY 0x01 /* allocated TX queue */
77 #define TS_RXQ_RDY 0x02 /* allocated RX queue */
[all …]
/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Depic100.h30 LAN0 = 0x40, /* MAC address. (0x40-0x48) */
32 MC0 = 0x50, /* Multicast filter table. (0x50-0x5c) */
57 #define INTR_TX_IN_PROG (0x00100000) /* tx copy in progess. NI */
59 #define INTR_TXIDLE (0x00040000) /* tx idle. NI */
69 #define INTR_TXUNDERRUN (0x00000100) /* tx underrun. */
70 #define INTR_TXEMPTY (0x00000080) /* tx queue empty */
71 #define INTR_TX_CH_COMPLETE (0x00000040) /* tx chain complete */
72 #define INTR_TXDONE (0x00000020) /* tx complete (w or w/o err) */
75 #define INTR_RX_QUEUE_EMPTY (0x00000004) /* rx queue empty. */
99 * begins to empty the receive FIFO. Possible values: 0-3
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/freebsd/tools/tools/netmap/
H A Dpkt-gen.c2 * Copyright (C) 2011-2014 Matteo Landi, Luigi Rizzo. All rights reserved.
3 * Copyright (C) 2013-2015 Universita` di Pisa. All rights reserved.
28 * $Id: pkt-gen.c 12346 2013-06-12 17:36:25Z luigi $
133 n->octet[0], n->octet[1], n->octet[2], in ether_ntoa()
134 n->octet[3], n->octet[4], n->octet[5]); in ether_ntoa()
184 static const char *default_payload = "netmap pkt-gen DIRECT payload\n"
187 static const char *indirect_payload = "netmap pkt-gen indirect payload\n"
193 #define VIRT_HDR_1 10 /* length of a base vnet-hdr */
194 #define VIRT_HDR_2 12 /* length of the extenede vnet-hdr */
202 struct pkt { struct
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/freebsd/sys/dev/vge/
H A Dif_vgereg.h1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
37 * Definitions for the built-in copper PHY can be found in vgphy.h.
41 * using 32-bit I/O cycles, but some of them are less than 32 bits
55 #define VGE_TXCTL 0x07 /* TX control register */
81 #define VGE_TXHOSTERR 0x22 /* TX host error status */
86 #define VGE_TXQCSRS 0x30 /* TX queue ctl/status set */
87 #define VGE_RXQCSRS 0x32 /* RX queue ctl/status set */
88 #define VGE_TXQCSRC 0x34 /* TX queue ctl/status clear */
[all …]
/illumos-gate/usr/src/uts/common/io/ath/
H A Dath_impl.h7 * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
20 * 3. Neither the names of the above-listed copyright holders nor the names
75 #define ATH_DBG_RECV 0x00000010 /* receive-side code */
76 #define ATH_DBG_SEND 0x00000020 /* packet-send code */
108 #define list_empty(a) ((a)->list_head.list_next == &(a)->list_head)
114 #define ATH_TXQ_SETUP(asc, i) ((asc)->asc_txqsetup & (1<<i))
116 ((struct ath_desc *)((caddr_t)(_asc)->asc_desc + \
117 ((_pa) - (_asc)->asc_desc_dma.cookie.dmac_address)))
127 #define ATH_TXBUF 200 /* number of TX buffers */
134 /* driver-specific node state */
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/illumos-gate/usr/src/uts/common/io/chxge/
H A Dsge.h30 * Copyright (C) 2003-2005 Chelsio Communications. All rights reserved.
48 #define atomic_sub(a, b) atomic_add_32(b, -(a))
56 #define skb_reserve(skb, offset) (skb->b_rptr += offset)
57 #define __skb_pull(skb, len) (skb->b_rptr += len)
58 #define skb_put(skb, len) ((skb)->b_wptr = (skb)->b_rptr + (len))
59 #define skb_pull(skb, len) (skb->b_rptr += len)
62 #define SKB_DATA_ALIGN(X) (((X) + (sizeof (long)-1)) & ~(sizeof (long)-1))
66 #define SGE_SM_BUF_SZ(sa) (sa->ch_sm_buf_sz)
67 #define SGE_BG_BUF_SZ(sa) (sa->ch_bg_buf_sz)
95 #define SGE_RX_SM_BUF_SIZE(sa) (sa->ch_sm_buf_sz)
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/freebsd/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_main.c1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
84 /* tx Meta Descriptor defines */
98 /* tx Meta Descriptor defines - MacSec */
99 #define AL_ETH_TX_MACSEC_SIGN_SHIFT 0 /* Sign TX pkt */
100 #define AL_ETH_TX_MACSEC_ENCRYPT_SHIFT 1 /* Encrypt TX pkt */
105 #define AL_ETH_TX_MACSEC_SECURED_PYLD_LEN_LSB_SHIFT 10 /* Secure Payload Length (0x3FFF for non-S…
123 /* Tx VID Table*/
127 /* tx gpd defines */
140 /* tx gcp defines */
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/freebsd/crypto/openssl/include/internal/
H A Dquic_record_tx.h2 * Copyright 2022-2024 The OpenSSL Project Authors. All Rights Reserved.
23 * QUIC Record Layer - TX
49 /* Maximum datagram payload length (MDPL) for TX purposes. */
78 * -----------------
105 * Subsequent calls for non-INITIAL ELs fail. Calls made after a corresponding
107 * the INITIAL EL. The secret for a non-INITIAL EL cannot be changed after it is
158 * -------------------
166 * iovecs expressing the logical packet payload buffer. Zero-length entries
172 /* Destination address. Will be passed through to the BIO if non-NULL. */
176 * Local address (optional). Specify as non-NULL only if TX BIO
[all …]
/freebsd/sys/dev/igc/
H A Digc_base.h1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
17 /* Transmit Descriptor - Advanced */
50 #define IGC_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
52 #define IGC_ADVTXD_MAC_LINKSEC 0x00040000 /* Apply LinkSec on pkt */
53 #define IGC_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp pkt */
59 /* 1st & Last TSO-full iSCSI PDU*/
86 /* Receive Descriptor - Advanced */
97 __le16 pkt_info; /*RSS type, Pkt type*/
119 #define IGC_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */
[all …]
/illumos-gate/usr/src/uts/common/io/igc/core/
H A Digc_base.h1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
17 /* Transmit Descriptor - Advanced */
50 #define IGC_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
52 #define IGC_ADVTXD_MAC_LINKSEC 0x00040000 /* Apply LinkSec on pkt */
53 #define IGC_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp pkt */
59 /* 1st & Last TSO-full iSCSI PDU*/
86 /* Receive Descriptor - Advanced */
97 __le16 pkt_info; /*RSS type, Pkt type*/
119 #define IGC_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */
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