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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,qe-ucc-qmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-ucc-qmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC QE QUICC Multichannel Controller (QMC)
10 - Herve Codina <herve.codina@bootlin.com>
13 The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one
19 - enum:
20 - fsl,mpc8321-ucc-qmc
21 - const: fsl,qe-ucc-qmc
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/linux/drivers/soc/fsl/qe/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # QE Communication options
7 bool "QUICC Engine (QE) framework support"
13 The QUICC Engine (QE) is a new generation of communications
16 for a machine with a QE coprocessor.
22 This option provides qe_lib support to UCC slow
23 protocols: UART, BISYNC, QMC
29 This option provides qe_lib support to UCC fast
32 config UCC config
37 tristate "CPM/QE TSA support"
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H A Dqmc.c1 // SPDX-License-Identifier: GPL-2.0
3 * QMC driver
10 #include <soc/fsl/qe/qmc.h>
12 #include <linux/dma-mapping.h>
23 #include <soc/fsl/qe/ucc_slow.h>
24 #include <soc/fsl/qe/qe.h>
28 /* SCC general mode register low (32 bits) (GUMR_L in QE) */
36 /* SCC general mode register high (32 bits) (identical to GUMR_H in QE) */
45 /* SCC event register (16 bits) (identical to UCCE in QE) */
55 /* UCC Extended Mode Register (8 bits, QE only) */
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the linux ppc-specific parts of QE
5 obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_common.o qe_ic.o qe_io.o
6 obj-$(CONFIG_CPM) += qe_common.o
7 obj-$(CONFIG_CPM_TSA) += tsa.o
8 obj-$(CONFIG_CPM_QMC) += qmc.o
9 obj-$(CONFIG_UCC) += ucc.o
10 obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
11 obj-$(CONFIG_UCC_FAST) += ucc_fast.o
12 obj-$(CONFIG_QE_TDM) += qe_tdm.o
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/linux/drivers/tty/serial/
H A Ducc_uart.c1 // SPDX-License-Identifier: GPL-2.0
12 * If Soft-UART support is needed but not already present, then this driver
13 * will request and upload the "Soft-UART" microcode upon probe. The
30 #include <linux/dma-mapping.h>
32 #include <soc/fsl/qe/ucc_slow.h>
42 * The GUMR flag for Soft UART. This would normally be defined in qe.h,
43 * but Soft-UART is a hack and we want to keep everything related to it in
46 #define UCC_SLOW_GUMR_H_SUART 0x00004000 /* Soft-UART */
49 * soft_uart is 1 if we need to use Soft-UART mode
62 * Documentation/admin-guide/devices.txt. For the QE
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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