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Searched +full:qdma +full:- +full:error (Results 1 – 8 of 8) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dfsl-qdma.txt1 NXP Layerscape SoC qDMA Controller
8 - compatible: Must be one of
9 "fsl,ls1021a-qdma": for LS1021A Board
10 "fsl,ls1028a-qdma": for LS1028A Board
11 "fsl,ls1043a-qdma": for ls1043A Board
12 "fsl,ls1046a-qdma": for ls1046A Board
13 - reg: Should contain the register's base address and length.
14 - interrupts: Should contain a reference to the interrupt used by this
16 - interrupt-names: Should contain interrupt names:
17 "qdma-queue0": the block0 interrupt
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H A Dfsl-qdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl-qdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Layerscape SoC qDMA Controller
10 - Frank Li <Frank.Li@nxp.com>
15 - const: fsl,ls1021a-qdma
16 - items:
17 - enum:
18 - fsl,ls1028a-qdma
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dairoha,en7581-eth.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/airoha,en7581-eth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
14 These SoCs have multi-GMAC ports.
19 - airoha,en7581-eth
23 - description: Frame engine base address
24 - description: QDMA0 base address
25 - description: QDMA1 base address
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/freebsd/sys/arm/ti/
H A Dti_edma3.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
101 * We use one-element array in case if we need to add
113 { -1, 0, 0 }
119 { -1, 0, 0 }
123 #define ti_edma3_cc_rd_4(reg) bus_read_4(ti_edma3_sc->mem_res[0], reg)
124 #define ti_edma3_cc_wr_4(reg, val) bus_write_4(ti_edma3_sc->mem_res[0], reg, val)
135 { ti_edma3_intr_mperr, "EDMA Memory Protection Error Interrupt" },
136 { ti_edma3_intr_err, "EDMA Error Interrupt" },
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
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H A Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
37 #address-cells = <1>;
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H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
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/freebsd/sys/contrib/device-tree/src/arm/nxp/ls/
H A Dls1021a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
12 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a7";
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