1 /*-
2  * SPDX-License-Identifier: BSD-3-Clause
4  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
101 	 * We use one-element array in case if we need to add 
113 	{ -1,               0,  0 }
119 	{ -1,               0,  0 }
123 #define ti_edma3_cc_rd_4(reg)		bus_read_4(ti_edma3_sc->mem_res[0], reg)
124 #define ti_edma3_cc_wr_4(reg, val)	bus_write_4(ti_edma3_sc->mem_res[0], reg, val)
135 	{ ti_edma3_intr_mperr,	"EDMA Memory Protection Error Interrupt" },
136 	{ ti_edma3_intr_err,	"EDMA Error Interrupt" },
165 	sc->sc_dev = dev;  in ti_edma3_attach()
168 	err = bus_alloc_resources(dev, ti_edma3_mem_spec, sc->mem_res);  in ti_edma3_attach()
170 		device_printf(dev, "Error: could not allocate mem resources\n");  in ti_edma3_attach()
175 	err = bus_alloc_resources(dev, ti_edma3_irq_spec, sc->irq_res);  in ti_edma3_attach()
177 		device_printf(dev, "Error: could not allocate irq resources\n");  in ti_edma3_attach()
192 		err = bus_setup_intr(dev, sc->irq_res[i], INTR_TYPE_MISC |  in ti_edma3_attach()
194 		    sc, &sc->ih_cookie[i]);  in ti_edma3_attach()
249 	/* Clear Error Reg */  in ti_edma3_init()
252 	/* Enable DMA channels 0-63 */  in ti_edma3_init()
268 	/* Enable the QDMA Region access for all channels */  in ti_edma3_init()
269 	ti_edma3_cc_wr_4(TI_EDMA3CC_QRAE(0), (1 << TI_EDMA3_NUM_QDMA_CHS) - 1);  in ti_edma3_init()
271 	/*Initialize QDMA Queue Number Registers */  in ti_edma3_init()
292 		ti_edma3_cc_wr_4(TI_EDMA3CC_S_IESRH(0), 1 << (ch - 32));  in ti_edma3_enable_event_intr()
313 		reg |= (0x01 << (ch - 32));  in ti_edma3_request_dma_ch()
340 	/* Enable the QDMA channel in the QRAE registers */  in ti_edma3_request_qdma_ch()
345 	/* Associate QDMA Channel to Event Queue */  in ti_edma3_request_qdma_ch()
369 		ti_edma3_cc_wr_4(TI_EDMA3CC_S_ESRH(0), 1 <<  (ch - 32));  in ti_edma3_enable_transfer_manual()
381 	/* set corresponding bit in QEESR to enable QDMA event */  in ti_edma3_enable_transfer_qdma()
400 		ti_edma3_cc_wr_4(TI_EDMA3CC_S_SECRH(0), 1 << (ch - 32));  in ti_edma3_enable_transfer_event()
401 		ti_edma3_cc_wr_4(TI_EDMA3CC_EMCRH, 1 << (ch - 32));  in ti_edma3_enable_transfer_event()
402 		ti_edma3_cc_wr_4(TI_EDMA3CC_S_EESRH(0), 1 << (ch - 32));  in ti_edma3_enable_transfer_event()
411 	bus_write_region_4(ti_edma3_sc->mem_res[0], TI_EDMA3CC_OPT(ch),  in ti_edma3_param_write()
418 	bus_read_region_4(ti_edma3_sc->mem_res[0], TI_EDMA3CC_OPT(ch),  in ti_edma3_param_read()