Searched +full:qca8k +full:- +full:nsscc (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/clock/qcom,qca8k-nsscc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Bjorn Andersson <andersson@kernel.org>11 - Luo Jie <quic_luoj@quicinc.com>18 include/dt-bindings/clock/qcom,qca8k-nsscc.h19 include/dt-bindings/reset/qcom,qca8k-nsscc.h24 - const: qcom,qca8084-nsscc25 - items:[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o4 clk-qcom-y += common.o5 clk-qcom-y += clk-regmap.o6 clk-qcom-y += clk-alpha-pll.o7 clk-qcom-y += clk-pll.o8 clk-qcom-y += clk-rcg.o9 clk-qcom-y += clk-rcg2.o10 clk-qcom-y += clk-branch.o11 clk-qcom-y += clk-regmap-divider.o[all …]
1 // SPDX-License-Identifier: GPL-2.0-only6 #include <linux/clk-provider.h>16 #include <dt-bindings/clock/qcom,qca8k-nsscc.h>17 #include <dt-bindings/reset/qcom,qca8k-nsscc.h>19 #include "clk-branch.h"20 #include "clk-rcg.h"21 #include "clk-regmap.h"22 #include "clk-regmap-divider.h"23 #include "clk-regmap-mux.h"2020 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+[all …]
1 # SPDX-License-Identifier: GPL-2.0-only326 NSSCC receives the clock sources from GCC, CMN PLL and UNIPHY (PCS).339 tristate "QCA8K(QCA8386 or QCA8084) NSS Clock Controller"345 PHY device. Select this for the root clock of qca8k.1425 Say Y if you want to toggle LPASS-adjacent resets within1555 tristate "High-Frequency PLL (HFPLL) Clock Controller"1557 Support for the high-frequency PLLs present on Qualcomm devices.