| /linux/drivers/net/ethernet/mediatek/ |
| H A D | airoha_eth.c | 298 /* QDMA */
811 struct airoha_qdma *qdma; member
830 struct airoha_qdma *qdma; member
878 /* descriptor and packet buffers for qdma hw forward */
886 struct airoha_qdma *qdma; member
910 struct airoha_qdma qdma[AIROHA_MAX_NUM_QDMA]; member
943 #define airoha_qdma_rr(qdma, offset) \ argument
944 airoha_rr((qdma)->regs, (offset))
945 #define airoha_qdma_wr(qdma, offset, val) \ argument
946 airoha_wr((qdma)->regs, (offset), (val))
[all …]
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| H A D | mtk_eth_soc.h | 236 /* QDMA TX Queue Configuration Registers */
240 /* QDMA Tx Queue Scheduler Configuration Registers */
254 /* QDMA TX Scheduler Rate Control Register */
257 /* QDMA Global Configuration Register */
269 /* QDMA V2 Global Configuration Register */
277 /* QDMA Flow Control Register */
282 /* QDMA Interrupt Status Register */
300 /* QDMA Interrupt grouping registers */
303 /* QDMA TX NUM */
309 /* QDMA V2 descriptor txd6 */
[all …]
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| H A D | mtk_eth_soc.c | 60 .qdma = {
126 .qdma = {
177 .qdma = {
775 mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); in mtk_set_queue_speed()
1138 /* the qdma core needs scratch memory to be setup */
1197 mtk_w32(eth, eth->phy_scratch_ring, soc->reg_map->qdma.fq_head); in mtk_init_fq_dma()
1198 mtk_w32(eth, phy_ring_tail, soc->reg_map->qdma.fq_tail); in mtk_init_fq_dma()
1199 mtk_w32(eth, (cnt << 16) | cnt, soc->reg_map->qdma.fq_count); in mtk_init_fq_dma()
1200 mtk_w32(eth, MTK_QDMA_PAGE_SIZE << 16, soc->reg_map->qdma.fq_blen); in mtk_init_fq_dma()
1527 mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr); in mtk_tx_map()
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| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | fsl-qdma.yaml | 4 $id: http://devicetree.org/schemas/dma/fsl-qdma.yaml#
7 title: NXP Layerscape SoC qDMA Controller
15 - const: fsl,ls1021a-qdma
18 - fsl,ls1028a-qdma
19 - fsl,ls1043a-qdma
20 - fsl,ls1046a-qdma
21 - const: fsl,ls1021a-qdma
36 - const: qdma-error
37 - const: qdma-queue0
38 - const: qdma-queue1
[all …]
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | airoha,en7581-eth.yaml | 35 - description: QDMA lan irq0
36 - description: QDMA lan irq1
37 - description: QDMA lan irq2
38 - description: QDMA lan irq3
39 - description: QDMA wan irq0
40 - description: QDMA wan irq1
41 - description: QDMA wan irq2
42 - description: QDMA wan irq3
53 - const: qdma
120 reset-names = "fe", "pdma", "qdma", "xsi-mac",
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| /linux/drivers/dma/amd/qdma/ |
| H A D | Makefile | 3 obj-$(CONFIG_AMD_QDMA) += amd-qdma.o
5 amd-qdma-$(CONFIG_AMD_QDMA) := qdma.o qdma-comm-regs.o
|
| H A D | qdma.c | 17 #include "qdma.h"
22 /* MMIO regmap config for all QDMA registers */
934 IRQF_ONESHOT, "amd-qdma-error", qdev); in qdma_init_error_irq()
1000 "amd-qdma-queue", ring); in qdmam_alloc_qintr_rings()
1117 qdma_err(qdev, "Failed to register AMD QDMA: %d", ret); in amd_qdma_probe()
1127 qdma_err(qdev, "Failed to probe AMD QDMA driver"); in amd_qdma_probe()
1133 .name = "amd-qdma",
1141 MODULE_DESCRIPTION("AMD QDMA driver");
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| H A D | qdma-comm-regs.c | 9 #include "qdma.h"
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| H A D | qdma.h | 24 #define QDMA_INTR_PREFIX "amd-qdma"
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| /linux/drivers/dma/amd/ |
| H A D | Kconfig | 39 mechanism to transfer data using the QDMA is for the QDMA engine to
41 system. Using the descriptors, the QDMA can move data in either the
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| H A D | Makefile | 5 obj-$(CONFIG_AMD_QDMA) += qdma/
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| /linux/drivers/dma/fsl-dpaa2-qdma/ |
| H A D | Makefile | 2 # Makefile for the NXP DPAA2 qDMA controllers
3 obj-$(CONFIG_FSL_DPAA2_QDMA) += dpaa2-qdma.o dpdmai.o
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| H A D | Kconfig | 2 tristate "NXP DPAA2 QDMA"
8 NXP Data Path Acceleration Architecture 2 QDMA driver,
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| H A D | dpaa2-qdma.h | 71 struct dpaa2_qdma_engine *qdma; member
77 /* spinlock used by dpaa2 qdma driver */
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | xlnx,xdma-host.yaml | 19 - xlnx,qdma-host-3.00
24 - description: QDMA bridge register.
95 - xlnx,qdma-host-3.00
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| /linux/drivers/pci/controller/ |
| H A D | pcie-xilinx-dma-pl.c | 81 QDMA, enumerator
135 if (port->variant->version == QDMA) in pcie_read()
143 if (port->variant->version == QDMA) in pcie_write()
200 if (port->variant->version == QDMA) in xilinx_pl_dma_pcie_map_bus()
754 if (port->variant->version == QDMA) { in xilinx_pl_dma_pcie_parse_dt()
830 .version = QDMA,
839 .compatible = "xlnx,qdma-host-3.00",
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls1043a.dtsi | 957 qdma: dma-controller@8380000 { label
958 compatible = "fsl,ls1043a-qdma", "fsl,ls1021a-qdma";
967 interrupt-names = "qdma-error", "qdma-queue0",
968 "qdma-queue1", "qdma-queue2", "qdma-queue3";
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| H A D | fsl-ls1046a.dtsi | 913 qdma: dma-controller@8380000 { label
914 compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma";
923 interrupt-names = "qdma-error", "qdma-queue0",
924 "qdma-queue1", "qdma-queue2", "qdma-queue3";
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| H A D | fsl-ls1028a.dtsi | 816 qdma: dma-controller@8380000 { label
817 compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
826 interrupt-names = "qdma-error", "qdma-queue0",
827 "qdma-queue1", "qdma-queue2", "qdma-queue3";
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| /linux/include/linux/platform_data/ |
| H A D | amd_qdma.h | 25 * struct qdma_platdata - Platform specific data for QDMA engine
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| H A D | edma.h | 33 * DaVinci hardware also has a "QDMA" mechanism which is not currently
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| /linux/drivers/net/ethernet/sfc/ |
| H A D | ef100_ethtool.c | 20 /* This is the maximum number of descriptor rings supported by the QDMA */
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| /linux/arch/arm/boot/dts/nxp/ls/ |
| H A D | ls1021a.dtsi | 920 qdma: dma-controller@8390000 { label
921 compatible = "fsl,ls1021a-qdma";
928 interrupt-names = "qdma-error",
929 "qdma-queue0", "qdma-queue1";
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| /linux/include/uapi/linux/ |
| H A D | hdreg.h | 335 #define HDIO_GET_QDMA 0x0305 /* get use-qdma flag */
374 #define HDIO_SET_QDMA 0x032e /* change use-qdma flag */
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| /linux/drivers/usb/mtu3/ |
| H A D | mtu3_qmu.c | 262 dev_dbg(mep->mtu->dev, "TX-EP%d queue gpd=%p, enq=%p, qdma=%pad\n", in mtu3_prepare_tx_gpd()
305 dev_dbg(mep->mtu->dev, "RX-EP%d queue gpd=%p, enq=%p, qdma=%pad\n", in mtu3_prepare_rx_gpd()
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