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/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_crtc.c51 u64 pxlclk, aclk; in komeda_crtc_update_clock_ratio() local
58 pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL; in komeda_crtc_update_clock_ratio()
61 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); in komeda_crtc_update_clock_ratio()
151 err = clk_set_rate(master->pxlclk, mode->crtc_clock * 1000); in komeda_crtc_prepare()
153 DRM_ERROR("failed to set pxlclk for pipe%d\n", master->id); in komeda_crtc_prepare()
154 err = clk_prepare_enable(master->pxlclk); in komeda_crtc_prepare()
190 clk_disable_unprepare(master->pxlclk); in komeda_crtc_unprepare()
403 unsigned long pxlclk) in komeda_calc_min_aclk_rate() argument
406 * the aclk needs run on the double rate of pxlclk in komeda_calc_min_aclk_rate()
409 return pxlclk * 2; in komeda_calc_min_aclk_rate()
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H A Dkomeda_kms.h113 /** @clock_ratio: ratio of (aclk << 32)/pxlclk */
H A Dkomeda_pipeline.h392 /** @pxlclk: pixel clock */
393 struct clk *pxlclk; member
H A Dkomeda_pipeline.c60 clk_put(pipe->pxlclk); in komeda_pipeline_destroy()
/linux/Documentation/devicetree/bindings/display/
H A Dsnps,arcpgu.txt13 - "pxlclk" for the clock feeding the output PLL of the controller.
27 clock-names = "pxlclk";
H A Darm,hdlcd.yaml30 const: pxlclk
67 clock-names = "pxlclk";
H A Darm,malidp.yaml47 - const: pxlclk
109 clock-names = "pxlclk", "mclk", "aclk", "pclk";
/linux/drivers/gpu/drm/arm/
H A Dmalidp_crtc.c38 rate = clk_round_rate(hwdev->pxlclk, req_rate); in malidp_crtc_mode_valid()
40 DRM_DEBUG_DRIVER("pxlclk doesn't support %ld Hz\n", in malidp_crtc_mode_valid()
63 clk_prepare_enable(hwdev->pxlclk); in malidp_crtc_atomic_enable()
66 clk_set_rate(hwdev->pxlclk, crtc->state->adjusted_mode.crtc_clock * 1000); in malidp_crtc_atomic_enable()
88 clk_disable_unprepare(hwdev->pxlclk); in malidp_crtc_atomic_disable()
H A Dmalidp_drv.c744 hwdev->pxlclk = devm_clk_get(dev, "pxlclk"); in malidp_bind()
745 if (IS_ERR(hwdev->pxlclk)) in malidp_bind()
746 return PTR_ERR(hwdev->pxlclk); in malidp_bind()
H A Dmalidp_hw.c484 unsigned long pxlclk = vm->pixelclock; /* Hz */ in malidp500_se_calc_mclk() local
492 * mclk = max(a, 1.5) * pxlclk in malidp500_se_calc_mclk()
502 mclk = a * pxlclk / 10; in malidp500_se_calc_mclk()
825 unsigned long pxlclk = vm->pixelclock; in malidp550_se_calc_mclk() local
840 /* mclk can't be slower than pxlclk. */ in malidp550_se_calc_mclk()
843 mclk = (pxlclk * numerator) / denominator; in malidp550_se_calc_mclk()
H A Dmalidp_hw.h240 struct clk *pxlclk; member
H A Dhdlcd_drv.c106 hdlcd->clk = devm_clk_get(drm->dev, "pxlclk"); in hdlcd_load()
/linux/arch/arc/boot/dts/
H A Dnsimosci.dts68 clock-names = "pxlclk";
H A Dnsimosci_hs.dts68 clock-names = "pxlclk";
H A Dnsimosci_hs_idu.dts74 clock-names = "pxlclk";
H A Dvdk_axs10x_mb.dtsi90 clock-names = "pxlclk";
H A Daxs10x_mb.dtsi309 clock-names = "pxlclk";
/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi732 clock-output-names = "pxlclk";
874 clock-names = "pxlclk";
889 clock-names = "pxlclk";
/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca5s.dts77 clock-names = "pxlclk";
H A Dvexpress-v2p-ca15-tc1.dts75 clock-names = "pxlclk";
H A Dvexpress-v2p-ca15_a7.dts139 clock-names = "pxlclk";
/linux/drivers/gpu/drm/tiny/
H A Darcpgu.c257 arcpgu->clk = devm_clk_get(drm->dev, "pxlclk"); in arcpgu_load()
/linux/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_component.c885 * PXLCLK (h_total - (1 + 2 * v_in / v_out)) * v_out in d71_downscaling_clk_check()
892 * PXLCLK (h_active - 3) in d71_downscaling_clk_check()
898 * PXLCLK (h_total -1 ) * v_out - 2 * v_in in d71_downscaling_clk_check()
/linux/drivers/gpu/drm/amd/display/dc/bios/
H A Dcommand_table.c1539 * [output pxlClk/input pxlClk] */ in adjust_display_pll_v2()
1589 * [output pxlClk/input pxlClk] */ in adjust_display_pll_v3()
/linux/drivers/media/usb/gspca/
H A Detoms.c128 #define PAS106_REG2 0x02 /* pxlClk = systemClk/(reg2) */

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