Home
last modified time | relevance | path

Searched +full:pwm +full:- +full:active +full:- +full:state (Results 1 – 25 of 158) sorted by relevance

1234567

/linux/drivers/video/backlight/
H A Dpwm_bl.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Simple PWM based backlight control, board code has to setup
4 * 1) pin configuration so PWM waveforms can output
16 #include <linux/pwm.h>
22 struct pwm_device *pwm; member
43 if (pb->enabled) in pwm_backlight_power_on()
46 if (pb->power_supply) { in pwm_backlight_power_on()
47 err = regulator_enable(pb->power_supply); in pwm_backlight_power_on()
49 dev_err(pb->dev, "failed to enable power supply\n"); in pwm_backlight_power_on()
52 if (pb->post_pwm_on_delay) in pwm_backlight_power_on()
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8916-samsung-gt510.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-samsung-gt5-common.dtsi"
10 chassis-type = "tablet";
12 speaker_codec: audio-codec {
14 sdmode-gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>;
15 #sound-dai-cells = <0>;
16 pinctrl-0 = <&audio_sdmode_default>;
17 pinctrl-names = "default";
20 clk_pwm: pwm {
[all …]
H A Dmsm8939-samsung-a7.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8939-pm8916.dtsi"
6 #include "msm8916-modem-qdsp6.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/sound/apq8016-lpass.h>
16 chassis-type = "handset";
25 stdout-path = "serial0";
[all …]
H A Dmsm8916-samsung-fortuna-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include "msm8916-pm8916.dtsi"
4 #include "msm8916-modem-qdsp6.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
19 stdout-path = "serial0";
22 reserved-memory {
24 tz-apps@85a00000 {
[all …]
H A Dmsm8916-samsung-a2015-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include "msm8916-pm8916.dtsi"
4 #include "msm8916-modem-qdsp6.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/sound/apq8016-lpass.h>
20 stdout-path = "serial0";
23 reserved-memory {
[all …]
/linux/drivers/pwm/
H A Dpwm-jz4740.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
4 * JZ4740 platform PWM support
7 * - The .apply callback doesn't complete the currently running period before
15 #include <linux/mfd/ingenic-tcu.h>
20 #include <linux/pwm.h>
39 /* Enable all TCU channels for PWM use by default except channels 0/1 */ in jz4740_pwm_can_use_chn()
40 u32 pwm_channels_mask = GENMASK(chip->npwm - 1, 2); in jz4740_pwm_can_use_chn()
42 device_property_read_u32(pwmchip_parent(chip)->parent, in jz4740_pwm_can_use_chn()
43 "ingenic,pwm-channels-mask", in jz4740_pwm_can_use_chn()
[all …]
H A Dpwm-omap-dmtimer.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Also based on pwm-samsung.c
13 * PWM driver / controller, using the OMAP's dual-mode timers
15 * reloaded with the load value and the pwm output goes up.
20 * - When PWM is stopped, timer counter gets stopped immediately. This
21 * doesn't allow the current PWM period to complete and stops abruptly.
22 * - When PWM is running and changing both duty cycle and period,
25 * is updated while the pwm pin is high, current pwm period/duty_cycle
27 * - period for current cycle = current_period + new period
28 * - duty_cycle for current period = current period + new duty_cycle.
[all …]
H A Dpwm-renesas-tpu.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Mobile TPU PWM driver
17 #include <linux/pwm.h>
62 TPU_PIN_PWM, /* Pin is driven by PWM */
63 TPU_PIN_ACTIVE, /* Pin is driven active */
96 void __iomem *base = tpd->tpu->base + TPU_CHANNEL_OFFSET in tpu_pwm_write()
97 + tpd->channel * TPU_CHANNEL_SIZE; in tpu_pwm_write()
103 enum tpu_pin_state state) in tpu_pwm_set_pin() argument
105 static const char * const states[] = { "inactive", "PWM", "active" }; in tpu_pwm_set_pin()
107 dev_dbg(&tpd->tpu->pdev->dev, "%u: configuring pin as %s\n", in tpu_pwm_set_pin()
[all …]
H A Dpwm-twl-led.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * This driver is a complete rewrite of the former pwm-twl6030.c authorded by:
15 * - The twl6030 hardware only supports two period lengths (128 clock ticks and
17 * - The hardware doesn't support ON = 0, so the active part of a period doesn't
19 * - The hardware could support inverted polarity (with a similar limitation as
21 * - The hardware emits a constant low output when disabled.
22 * - A request for .duty_cycle = 0 results in an output wave with one active
23 * clock tick per period. This should better use the disabled state.
24 * - The driver only implements setting the relative duty cycle.
25 * - The driver doesn't implement .get_state().
[all …]
H A Dpwm-sifive.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017-2018 SiFive
4 * For SiFive's PWM IP block documentation please refer Chapter 14 of
5 * Reference Manual : https://static.dev.sifive.com/FU540-C000-v1.0.pdf
7 * PWM output inversion: According to the SiFive Reference manual
12 * hard-tied to 0 (XNOR), which effectively inverts the comparison so that
16 * (low) period of the pulse, not the active time exactly opposite to what
21 * **active-high** PWM interface.
25 * - When changing both duty cycle and period, we cannot prevent in
28 * - The hardware cannot generate a 0% duty cycle.
[all …]
H A Dpwm-atmel.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Links to reference manuals for the supported PWM chips can be found in
12 * - Periods start with the inactive level.
13 * - Hardware has to be stopped in general to update settings.
16 * - When atmel_pwm_apply() is called with state->enabled=false a change in
17 * state->polarity isn't honored.
18 * - Instead of sleeping to wait for a completed period, the interrupt
29 #include <linux/pwm.h>
32 /* The following is global registers for PWM controller */
40 /* The following register is PWM channel related registers */
[all …]
H A Dpwm-xilinx.c1 // SPDX-License-Identifier: GPL-2.0+
6 * - When changing both duty cycle and period, we may end up with one cycle
13 * - Cannot produce 100% duty cycle by configuring the TLRs. This might be
16 * - Only produces "normal" output.
17 * - Always produces low output if disabled.
20 #include <clocksource/timer-xilinx.h>
22 #include <linux/clk-provider.h>
27 #include <linux/pwm.h>
37 WARN_ON(cycles < 2 || cycles - 2 > priv->max); in xilinx_timer_tlr_cycles()
40 return cycles - 2; in xilinx_timer_tlr_cycles()
[all …]
/linux/Documentation/driver-api/
H A Dpwm.rst2 Pulse Width Modulation (PWM) interface
5 This provides an overview about the Linux PWM interface
9 the Linux PWM API (although they could). However, PWMs are often
12 this kind of flexibility the generic PWM API exists.
15 ----------------
17 Users of the legacy PWM API use unique IDs to refer to PWM devices.
19 Instead of referring to a PWM device via its unique ID, board setup code
20 should instead register a static mapping that can be used to match PWM
24 PWM_LOOKUP("tegra-pwm", 0, "pwm-backlight", NULL,
36 ----------
[all …]
H A Dmiscellaneous.rst4 .. kernel-doc:: include/linux/parport.h
7 .. kernel-doc:: drivers/parport/ieee1284.c
10 .. kernel-doc:: drivers/parport/share.c
13 .. kernel-doc:: drivers/parport/daisy.c
19 .. kernel-doc:: drivers/tty/serial/8250/8250_core.c
24 Pulse-Width Modulation (PWM)
27 Pulse-width modulation is a modulation technique primarily used to
30 The PWM framework provides an abstraction for providers and consumers of
31 PWM signals. A controller that provides one or more PWM signals is
33 are expected to embed this structure in a driver-specific structure.
[all …]
/linux/Documentation/devicetree/bindings/pwm/
H A Dnvidia,tegra20-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/nvidia,tegra20-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-pwm
18 - nvidia,tegra186-pwm
20 - items:
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-mini.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Authors: Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
19 model = "Bananapi BPI-R3 Mini";
20 chassis-type = "embedded";
21 compatible = "bananapi,bpi-r3mini", "mediatek,mt7986a";
[all …]
/linux/drivers/leds/rgb/
H A Dleds-pwm-multicolor.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PWM-based multi-color LED control
5 * Copyright 2022 Sven Schwermer <sven.schwermer@disruptive-technologies.com>
10 #include <linux/led-class-multicolor.h>
17 #include <linux/pwm.h>
20 struct pwm_device *pwm; member
21 struct pwm_state state; member
42 mutex_lock(&priv->lock); in led_pwm_mc_set()
44 for (i = 0; i < mc_cdev->num_colors; i++) { in led_pwm_mc_set()
45 duty = priv->leds[i].state.period; in led_pwm_mc_set()
[all …]
/linux/drivers/input/misc/
H A Dda7280.c1 // SPDX-License-Identifier: GPL-2.0+
16 #include <linux/pwm.h>
181 /* Maximum gain is 0x7fff for PWM mode */
258 bool active; member
289 error = regmap_read(haptics->regmap, DA7280_IRQ_STATUS1, &val); in da7280_haptic_mem_update()
293 dev_warn(haptics->dev, in da7280_haptic_mem_update()
295 return -EBUSY; in da7280_haptic_mem_update()
300 error = regmap_read(haptics->regmap, DA7280_MEM_CTL2, &val); in da7280_haptic_mem_update()
304 dev_warn(haptics->dev, "Please unlock the bit first\n"); in da7280_haptic_mem_update()
305 return -EACCES; in da7280_haptic_mem_update()
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-rockpro64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
20 stdout-path = "serial2:1500000n8";
23 clkin_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "clkin_gmac";
27 #clock-cells = <0>;
30 gpio-keys {
[all …]
H A Drk3399-khadas-edge.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pwm/pwm.h>
21 stdout-path = "serial2:1500000n8";
24 clkin_gmac: external-gmac-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
27 clock-output-names = "clkin_gmac";
[all …]
H A Drk3399-sapphire.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "dt-bindings/pwm/pwm.h"
7 #include "dt-bindings/input/input.h"
11 compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
20 stdout-path = "serial2:1500000n8";
23 clkin_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "clkin_gmac";
27 #clock-cells = <0>;
[all …]
H A Drk3399-kobol-helios64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
13 /dts-v1/;
26 avdd_0v9_s0: regulator-avdd-0v9-s0 {
27 compatible = "regulator-fixed";
28 regulator-name = "avdd_0v9_s0";
29 regulator-always-on;
30 regulator-boot-on;
31 regulator-min-microvolt = <900000>;
32 regulator-max-microvolt = <900000>;
33 vin-supply = <&vcc1v8_sys_s3>;
[all …]
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-amarula-rmm.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "amarula,imx28-rmm", "fsl,imx28";
22 compatible = "pwm-backlight";
23 pwms = <&pwm 4 5000000 0>;
24 brightness-levels = <0 255>;
25 num-interpolated-steps = <255>;
26 default-brightness-level = <255>;
[all …]
/linux/drivers/hwmon/
H A Daspeed-g6-pwm-tach.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * PWM/TACH controller driver for Aspeed ast2600 SoCs.
9 * Q := (DIV_L + 1) << DIV_H / input-clk
10 * The length of a PWM period is (DUTY_CYCLE_PERIOD + 1) * Q.
15 * period the output is active until DUTY_CYCLE_FALLING_POINT * Q. Note
17 * always active.
20 * PIN_ENABLE: When it is unset the pwm controller will emit inactive level to the external.
21 * Use to determine whether the PWM channel is enabled or disabled
22 * CLK_ENABLE: When it is unset the pwm controller will assert the duty counter reset and
23 * emit inactive level to the PIN_ENABLE mux after that the driver can still change the pwm period
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun5i-a13-pocketbook-touch-lux-3.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 /dts-v1/;
7 #include "sun5i-a13.dtsi"
8 #include "sunxi-common-regulators.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/pwm/pwm.h>
16 compatible = "pocketbook,touch-lux-3", "allwinner,sun5i-a13";
26 compatible = "pwm-backlight";
[all …]

1234567