Lines Matching +full:pwm +full:- +full:active +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jean Delvare <jdelvare@suse.com>
23 https://www.onsemi.com/pub/Collateral/ADT7473-D.PDF
24 https://www.onsemi.com/pub/Collateral/ADT7475-D.PDF
25 https://www.onsemi.com/pub/Collateral/ADT7476-D.PDF
26 https://www.onsemi.com/pub/Collateral/ADT7490-D.PDF
34 - adi,adt7473
35 - adi,adt7475
36 - adi,adt7476
37 - adi,adt7490
42 adi,pwm-active-state:
44 Integer array, represents the active state of the pwm outputs If set to 0
45 the pwm uses a logic low output for 100% duty cycle. If set to 1 the pwm
47 $ref: /schemas/types.yaml#/definitions/uint32-array
55 "#pwm-cells":
58 Number of cells in a PWM specifier.
59 - 0: The PWM channel
60 - 1: The PWM period in nanoseconds
61 - 90909091 (11 Hz)
62 - 71428571 (14 Hz)
63 - 45454545 (22 Hz)
64 - 34482759 (29 Hz)
65 - 28571429 (35 Hz)
66 - 22727273 (44 Hz)
67 - 17241379 (58 Hz)
68 - 11363636 (88 Hz)
69 - 44444 (22 kHz)
70 - 2: PWM flags 0 or PWM_POLARITY_INVERTED
71 - 3: The default PWM duty cycle in nanoseconds
74 "^adi,bypass-attenuator-in[0-4]$":
83 "^adi,pin(5|10)-function$":
89 - pwm2
90 - smbalert#
92 "^adi,pin(9|14)-function$":
98 - tach4
99 - therm#
100 - smbalert#
101 - gpio
103 "^fan-[0-9]+$":
104 $ref: fan-common.yaml#
108 - compatible
109 - reg
114 - |
115 #include <dt-bindings/pwm/pwm.h>
117 #address-cells = <1>;
118 #size-cells = <0>;
120 pwm: hwmon@2e {
123 adi,bypass-attenuator-in0 = <1>;
124 adi,bypass-attenuator-in1 = <0>;
125 adi,pin10-function = "smbalert#";
126 adi,pin14-function = "tach4";
127 #pwm-cells = <4>;
130 fan-0 {
131 pwms = <&pwm 0 44444 0 22222>;
134 fan-1 {
135 pwms = <&pwm 2 44444 0 22222>;